IP Library Granted Patent US 8,255,760
Granted Patent B2
US 8,255,760 · App. 12/612,648 · Granted Aug 28, 2012

Header encoding for single carrier (SC) and/or orthogonal frequency division multiplexing (OFDM) using shortening, puncturing, and/or repetition

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Quick Facts
Patent No.
US 8,255,760
App. No.
12/612,648
Granted
Aug 28, 2012
Kind
B2
Abstract

Header encoding for SC and/or OFDM signaling using shortening, puncturing, and/or repetition in accordance with encoding header information within a frame to be transmitted via a communication channel employs different respective puncturing patterns as applied to different portions thereof. For example, a first puncturing pattern is applied to a first portion of the frame, and a second puncturing pattern is applied to a second portion of the frame (the second portion may be a repeated version of the first portion). Shortening (e.g., by padding 0-valued bits thereto) may be made to header information bits before they undergo encoding (e.g., in an LDPC encoder). One or both of the information bits and parity/redundancy bits output from the encoder undergo selective puncturing. Moreover, one or both of the information bits and parity/redundancy bits output from the encoder may be repeated/spread before undergoing selective puncturing to generate a header.

Claims (150)

1. An apparatus, comprising:

a padding circuitry that is operative to pad at least one bit to a plurality of header information bits thereby generating a padded bit block;

an LDPC (Low Density Parity Check) encoder circuitry, coupled to the padding circuitry, that is operative to encode the padded bit block thereby generating a plurality of LDPC coded bits;

a shorten/puncture circuitry, coupled to the encoder circuitry, that is operative to:

shorten at least one bit within the plurality of LDPC coded bits that corresponds to the at least one bit padded to the plurality of header information bits thereby generating a plurality of shortened coded bits;

perform repetition coding on the plurality of shortened coded bits thereby generating at least one duplicate of the plurality of shortened coded bits;

puncture at least one of the plurality of shortened coded bits thereby generating a first plurality of remaining bits; and

puncture at least one of the at least one duplicate of the plurality of shortened coded bits thereby generating a second plurality of remaining bits; and

a spreader circuitry, coupled to the shorten/puncture circuitry, that is operative to process the first plurality of remaining bits and the second plurality of remaining bits thereby generating a header.

2. The apparatus of claim 1 , further comprising:

a scrambler circuitry that is operative to scramble the plurality of header information bits before the plurality of header information bits is provided to the padding circuitry.

3. The apparatus of claim 1 , wherein:

the header is emplaced into a signal that is launched from the apparatus into a communication channel using single carrier signaling.

4. The apparatus of claim 1 , wherein the spreader circuitry is operative to generate the header by arranging:

the plurality of header information bits;

followed by a duplicate of plurality of header information bits;

followed by the first set of remaining bits; and

followed by the second set of remaining bits.

5. The apparatus of claim 1 , wherein the spreader circuitry is operative to generate the header by arranging:

the plurality of header information bits;

followed by the first set of remaining bits;

followed by a duplicate of plurality of header information bits; and

followed by the second set of remaining bits.

6. The apparatus of claim 1 , wherein:

the at least one duplicate of the plurality of shortened coded bits includes a first duplicate of the plurality of shortened coded bits and a second duplicate of the plurality of shortened coded bits; and

the shorten/puncture circuitry is operative to:

puncture at least one of the first duplicate of the plurality of shortened coded bits thereby generating the second plurality of remaining bits; and

puncture at least one of the second duplicate of the plurality of shortened coded bits thereby generating a third plurality of remaining bits; and

the spreader circuitry is operative to process the first plurality of remaining bits, the second plurality of remaining bits, and the third plurality of remaining bits thereby generating the header.

7. The apparatus of claim 6 , wherein:

the header is emplaced into a signal that is launched from the apparatus into a communication channel using orthogonal frequency division multiplexing (OFDM) signaling.

8. The apparatus of claim 6 , wherein the spreader circuitry is operative to generate the header by arranging:

the plurality of header information bits;

followed by a first duplicate of plurality of header information bits;

followed by a second duplicate of plurality of header information bits;

followed by the first set of remaining bits;

followed by the second set of remaining bits; and

followed by the third set of remaining bits.

9. The apparatus of claim 6 , wherein the spreader circuitry is operative to generate the header by arranging:

the plurality of header information bits;

followed by the first set of remaining bits;

followed by a first duplicate of plurality of header information bits;

followed by the second set of remaining bits;

followed by a second duplicate of plurality of header information bits; and

followed by the third set of remaining bits.

10. The apparatus of claim 1 , wherein:

the apparatus is operative to generate a frame that includes the header and data; and

the header indicates a plurality of information corresponding to the frame or data including frame length, a code type by which the data are encoded, a code rate by which the data are encoded, and at least one modulation by which symbols of the data are modulated.

11. The apparatus of claim 1 , wherein:

the apparatus is a communication device; and

the communication device is implemented within at least one of a satellite communication system, a wireless communication system, a wired communication system, and a fiber-optic communication system.

12. An apparatus, comprising:

a scrambler circuitry that is operative to scramble a plurality of header information bits thereby generating a scrambled plurality of header information bits;

a padding circuitry that is operative to pad at least one bit to a scrambled plurality of header information bits thereby generating a padded bit block;

an LDPC (Low Density Parity Check) encoder circuitry, coupled to the padding circuitry, that is operative to encode the padded bit block thereby generating a plurality of LDPC coded bits;

a shorten/puncture circuitry, coupled to the encoder circuitry, that is operative to:

shorten at least one bit within the plurality of LDPC coded bits that corresponds to the at least one bit padded to the scrambled plurality of header information bits thereby generating a plurality of shortened coded bits;

perform repetition coding on the plurality of shortened coded bits thereby generating at least one duplicate of the plurality of shortened coded bits;

employ a first puncturing pattern to puncture at least one of the plurality of shortened coded bits thereby generating a first plurality of remaining bits; and

employ a second puncturing pattern to puncture at least one of the at least one duplicate of the plurality of shortened coded bits thereby generating a second plurality of remaining bits; and

a spreader circuitry, coupled to the shorten/puncture circuitry, that is operative to process the first plurality of remaining bits and the second plurality of remaining bits thereby generating a header; and wherein:

the apparatus is operative to generate a frame that includes the header and data; and

the header indicates a plurality of information corresponding to the frame or data including frame length, a code type by which the data are encoded, a code rate by which the data are encoded, and at least one modulation by which symbols of the data are modulated.

13. The apparatus of claim 12 , wherein:

the header is emplaced into a signal that is launched from the apparatus into a communication channel using single carrier signaling.

14. The apparatus of claim 12 , wherein the spreader circuitry is operative to generate the header by arranging:

the scrambled plurality of header information bits;

followed by a duplicate of the scrambled plurality of header information bits;

followed by the first set of remaining bits; and

followed by the second set of remaining bits.

15. The apparatus of claim 12 , wherein the spreader circuitry is operative to generate the header by arranging:

the scrambled plurality of header information bits;

followed by the first set of remaining bits;

followed by a duplicate of the scrambled plurality of header information bits; and

followed by the second set of remaining bits.

16. The apparatus of claim 12 , wherein:

the at least one duplicate of the plurality of shortened coded bits includes a first duplicate of the plurality of shortened coded bits and a second duplicate of the plurality of shortened coded bits; and

the shorten/puncture circuitry is operative to:

puncture at least one of the first duplicate of the plurality of shortened coded bits thereby generating the second plurality of remaining bits; and

puncture at least one of the second duplicate of the plurality of shortened coded bits thereby generating a third plurality of remaining bits; and

the spreader circuitry is operative to process the first plurality of remaining bits, the second plurality of remaining bits, and the third plurality of remaining bits thereby generating the header.

17. The apparatus of claim 16 , wherein:

the header is emplaced into a signal that is launched from the apparatus into a communication channel using orthogonal frequency division multiplexing (OFDM) signaling.

18. The apparatus of claim 16 , wherein the spreader circuitry is operative to generate the header by arranging:

the scrambled plurality of header information bits;

followed by a first duplicate of the scrambled plurality of header information bits;

followed by a second duplicate of the scrambled plurality of header information bits;

followed by the first set of remaining bits;

followed by the second set of remaining bits; and

followed by the third set of remaining bits.

19. The apparatus of claim 16 , wherein the spreader circuitry is operative to generate the header by arranging:

the scrambled plurality of header information bits;

followed by the first set of remaining bits;

followed by a first duplicate of the scrambled plurality of header information bits;

followed by the second set of remaining bits;

followed by a second duplicate of the scrambled plurality of header information bits; and

followed by the third set of remaining bits.

20. The apparatus of claim 12 , wherein:

the apparatus is a communication device; and

the communication device is implemented within at least one of a satellite communication system, a wireless communication system, a wired communication system, and a fiber-optic communication system.

21. A method, comprising:

padding at least one bit to a plurality of header information bits thereby generating a padded bit block;

employing an LDPC (Low Density Parity Check) encoder circuitry to encode the padded bit block thereby generating a plurality of LDPC coded bits;

shortening at least one bit within the plurality of LDPC coded bits that corresponds to the at least one bit padded to the plurality of header information bits thereby generating a plurality of shortened coded bits;

performing repetition coding on the plurality of shortened coded bits thereby generating at least one duplicate of the plurality of shortened coded bits;

employing a first puncturing pattern to puncture at least one of the plurality of shortened coded bits thereby generating a first plurality of remaining bits; and

employing a second puncturing pattern to puncture at least one of the at least one duplicate of the plurality of shortened coded bits thereby generating a second plurality of remaining bits; and

processing the first plurality of remaining bits and the second plurality of remaining bits thereby generating a header.

22. The method of claim 21 , further comprising:

scrambling the plurality of header information bits before padding the at least one bit to the plurality of header information bits.

23. The method of claim 21 , further comprising:

emplacing into a signal that is launched into a communication channel using single carrier signaling.

24. The method of claim 21 , further comprising generating the header by arranging:

the plurality of header information bits;

followed by a duplicate of plurality of header information bits;

followed by the first set of remaining bits; and

followed by the second set of remaining bits.

25. The method of claim 21 , further comprising generating the header by arranging:

the plurality of header information bits;

followed by the first set of remaining bits;

followed by a duplicate of plurality of header information bits; and

followed by the second set of remaining bits.

26. The method of claim 21 , wherein:

the at least one duplicate of the plurality of shortened coded bits includes a first duplicate of the plurality of shortened coded bits and a second duplicate of the plurality of shortened coded bits; and

the shorten/puncture circuitry is operative to:

puncture at least one of the first duplicate of the plurality of shortened coded bits thereby generating the second plurality of remaining bits; and

puncture at least one of the second duplicate of the plurality of shortened coded bits thereby generating a third plurality of remaining bits; and

the spreader circuitry is operative to process the first plurality of remaining bits, the second plurality of remaining bits, and the third plurality of remaining bits thereby generating the header.

27. The method of claim 26 , further comprising:

emplacing into a signal that is launched into a communication channel using orthogonal frequency division multiplexing (OFDM) signaling.

28. The method of claim 26 , further comprising generating the header by arranging:

the plurality of header information bits;

followed by a first duplicate of plurality of header information bits;

followed by a second duplicate of plurality of header information bits;

followed by the first set of remaining bits;

followed by the second set of remaining bits; and

followed by the third set of remaining bits.

29. The method of claim 26 , further comprising generating the header by arranging:

the plurality of header information bits;

followed by the first set of remaining bits;

followed by a first duplicate of plurality of header information bits;

followed by the second set of remaining bits;

followed by a second duplicate of plurality of header information bits; and

followed by the third set of remaining bits.

30. The method of claim 21 , wherein:

the apparatus is operative to generate a frame that includes the header and data; and

the header indicates a plurality of information corresponding to the frame or data including frame length, a code type by which the data are encoded, a code rate by which the data are encoded, and at least one modulation by which symbols of the data are modulated.

31. The method of claim 21 , wherein:

the method is performed within a communication device; and

the communication device is implemented within at least one of a satellite communication system, a wireless communication system, a wired communication system, and a fiber-optic communication system.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 09/05/2018 PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0133. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0456 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0133 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2009
From: TRACHEWSKY, JASON A.; SHEN, BA-ZHONG
To: BROADCOM CORPORATION
Reel/Frame 023475/0653 →