Semiconductor device and method for fabricating the same

1. A semiconductor device, comprising:

a semiconductor substrate of a first conductivity type;

a first drain offset region of a second conductivity type formed in the semiconductor substrate;

a second drain offset region of the second conductivity type formed on the first drain offset region in the semiconductor substrate;

a third drain offset region of the second conductivity type formed on the second drain offset region in the semiconductor substrate;

a body region of the first conductivity type formed partly in the second drain offset region and partly in the third drain offset region;

a gate electrode formed over part of the body region and part of the third drain offset region with a gate insulating film interposed therebetween;

a source region of the second conductivity type formed in a surface portion of the body region, the surface portion being located laterally outwardly of and beneath the gate electrode; and

a drain region of the second conductivity type, having a higher impurity concentration than the third drain offset region, formed in a surface portion of the third drain offset region at a distance from the gate insulating film, the surface portion being located on an opposite side of the gate electrode from the source region,

wherein an impurity concentration in the second drain offset region is lower than impurity concentrations in the first and third drain offset regions; and

a curvature portion and bottom of the body region are both located in the second drain offset region.

2. A method for fabricating a semiconductor device, comprising the steps of:

(a) forming, in a semiconductor substrate of a first conductivity type, a first drain offset region of a second conductivity type, a second drain offset region of the second conductivity type, and a third drain offset region of the second conductivity type in that order in a bottom-up manner;

(b) forming a gate electrode over part of the third drain offset region with a gate insulating film interposed therebetween;

(c) forming a body region of the first conductivity type in an area located partly in the second drain offset region and partly in the third drain offset region and located laterally outwardly of and beneath a side of the gate electrode, so that the body region is partially overlapped by the gate electrode; and

(d) forming a source region of the second conductivity type in a surface portion of the body region, the surface portion being located laterally outwardly of and beneath the gate electrode, and forming a drain region of the second conductivity type having a higher impurity concentration than the third drain offset region, in a surface portion of the third drain offset region at a distance from the gate insulating film, the surface portion being located on an opposite side of the gate electrode from the source region,

wherein an impurity concentration in the second drain offset region is lower than impurity concentrations in the first and third drain offset regions; and

a curvature portion and bottom of the body region are both located in the second drain offset region.

3. A semiconductor device, comprising:

a semiconductor substrate of a first conductivity type;

a first drain offset region of a second conductivity type formed in the semiconductor substrate;

a body region of the first conductivity type formed in the first drain offset region;

a gate electrode formed over part of the body region and part of the first drain offset region with a gate insulating film interposed therebetween;

a source region of the second conductivity type formed in a surface portion of the body region, the surface portion being located laterally outwardly of and beneath the gate electrode; and

a drain region of the second conductivity type, having a higher impurity concentration than the first drain offset region, formed in a surface portion of the first drain offset region at a distance from the gate insulating film, the surface portion being located on an opposite side of the gate electrode from the source region,

wherein a second drain offset region having a lower impurity concentration than the first drain offset region is formed by counter doping in an area of the first drain offset region in which a curvature portion and bottom of the body region are located.

4. A method for fabricating a semiconductor device, comprising the steps of:

(a) forming, in a semiconductor substrate of a first conductivity type, a first drain offset region of a second conductivity type;

(b) forming a gate electrode over part of the first drain offset region with a gate insulating film interposed therebetween;

(c) forming a body region of the first conductivity type in an area of the first drain offset region so that the body region is partially overlapped by the gate electrode, the area being located laterally outwardly of and beneath a side of the gate electrode;

(d) forming a source region of the second conductivity type in a surface portion of the body region, the surface portion being located laterally outwardly of and beneath the gate electrode, and forming a drain region of the second conductivity type having a higher impurity concentration than the first drain offset region, in a surface portion of the first drain offset region at a distance from the gate insulating film, the surface portion being located on an opposite side of the gate electrode from the source region; and

(e) forming, by counter doping, a second drain offset region having a lower impurity concentration than the first drain offset region, in an area of the first drain offset region in which a curvature portion and bottom of the body region are located, after the step (c) is performed.