IP Library Granted Patent US 8,150,343
Granted Patent B2
US 8,150,343 · App. 12/617,647 · Granted Apr 3, 2012

Dynamic stability, gain, efficiency and impedance control in a linear/non-linear CMOS power amplifier

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Quick Facts
Patent No.
US 8,150,343
App. No.
12/617,647
Granted
Apr 3, 2012
Kind
B2
Abstract

A power amplifier (PA) provides dynamic stability and gain control for linear and non-linear operation. The PA operates with a baseband processor and a transmitter, in which the PA receives a signal from the transmitter for power amplification prior to transmission of the signal. The PA is configured to select between the linear mode of operation and the non-linear mode of operation, in which device scaling within the PA is achieved by changing a device sizing of at least one stage of the PA. Further to changing the device size, the PA changes biasing resistance and impedance of a matching network in response to the changing of the device size to control power output and stability for the PA.

Claims (34)

1. An apparatus comprising:

a baseband processing module to provide baseband processing to transmit a signal;

a transmitter module coupled to the baseband module to modulate the signal from the baseband processing module; and

a radio frequency (RF) amplifier module coupled to the transmitter module to receive the modulated signal and coupled to the baseband processing module to receive control signals from the baseband processing module to operate the RF amplifier module, wherein the RF amplifier module is operable to select between a linear mode of operation and a non-linear mode of operation in which the RF amplifier module is selectable to change device sizing of at least one stage of a RF amplifier circuit, change biasing of at least one stage of the RF amplifier circuit and change impedance of a matching network for at least one stage of the RF amplifier circuit, when switching between the non-linear and linear modes of operation.

2. The apparatus of claim 1 , wherein the baseband processing module, transmitter module and the RF amplifier module are integrated on a complementary metal-oxide-semiconductor (CMOS) integrated circuit device.

3. The apparatus of claim 1 , wherein the RF amplifier module includes a plurality of power transistors arranged in parallel and is operable to change device sizing by switching in and switching out one or more branches of the power transistors.

4. The apparatus of claim 1 , wherein the RF amplifier module includes a bias resistor for each of the at least one stage where the biasing is changed, wherein when biasing is changed for the at least one stage, a corresponding bias resistance value of the bias resistor for that stage is changed.

5. The apparatus of claim 1 , wherein the RF amplifier module also changes an impedance of a matching network at an output of the RF amplifier module to match an output of the RF amplifier module to an antenna.

6. The apparatus of claim 1 , wherein the RF amplifier module receives a modulated signal of varying amplitude and phase from the transmitter module when in the linear mode of operation and receives a constant amplitude signal from the transmitter module, but a modulated envelope is provided on a supply line to at least one stage of the RF amplifier module for polar modulation, when in the non-linear mode of operation.

7. An apparatus comprising:

a baseband processing module to provide baseband processing to transmit a signal;

a transmitter module coupled to the baseband module to convert the signal from the baseband processing module to a radio frequency (RF) signal; and

a power amplifier (PA) coupled to the transmitter module to receive the RF signal and coupled to the baseband processing module to receive control signals from the baseband processing module to operate the PA, wherein the PA is operable to select between a linear mode of operation and a non-linear mode of operation for the PA in which the PA has at least one stage that is selectable to change device sizing of a transistor circuit, change biasing of the transistor circuit and change matching network coupled to the transistor circuit, when switching between the non-linear and linear modes of operation.

8. The apparatus of 7 further including a supply control module to control a supply voltage coupled to the transistor circuit.

9. The apparatus of claim 8 , wherein the transistor circuit includes a plurality of power transistors arranged in parallel and, under control of the baseband processing module, the PA is operable to change device sizing by switching in and switching out one or more branches of the power transistors in order for the PA to set a predetermined output power level that determines a mode of operation for the PA.

10. The apparatus of claim 9 , wherein the transistor circuit includes a bias resistor coupled to an input of the transistor circuit, wherein when biasing is changed for the transistor circuit, a corresponding bias resistance value of the bias resistor is selected.

11. The apparatus of claim 10 , wherein the matching network is coupled to the input of the transistor circuit and a matching impedance is changed based on the device sizing selected for the transistor circuit.

12. The apparatus of claim 11 , wherein the PA also includes an adjustable output matching network at an output of the PA to adjust an output impedance to match an output of the PA to an antenna.

13. The apparatus of claim 11 , wherein the baseband processing module, transmitter module and the RF amplifier module are integrated on a complementary metal-oxide-semiconductor (CMOS) integrated circuit device.

14. The apparatus of claim 11 , wherein the PA has more than one stage that are selectable to change device sizing of a transistor circuit for that stage, change biasing of the transistor circuit for that stage and change matching network coupled to the corresponding transistor circuit for that stage, when switching between the non-linear and linear modes of operation.

15. The apparatus of claim 11 , wherein the PA receives a modulated signal of varying amplitude and phase from the transmitter module when in the linear mode of operation and receives a constant amplitude signal from the transmitter module, but a modulated envelope is provided by the supply control module on a supply line to the transistor circuit for polar modulation, when in the non-linear mode of operation.

16. A method comprising:

receiving a baseband signal that is to be transmitted;

converting the baseband signal to a radio frequency (RF) signal in a radio transmitter;

coupling the RF signal to a power amplifier (PA) that is integrated on a complementary metal-oxide-semiconductor (CMOS) integrated circuit device;

selecting an operating mode for the RF signal that is to be transmitted, wherein the operating mode includes both a linear mode of operation for the PA and a non-linear mode of operation for the PA;

selecting a device size for the PA based on a selected output power and mode of operation of the PA;

selecting a biasing resistance value for the PA based on a selected output power and mode of operation of the PA;

selecting an impedance of a matching network for the PA based on a selected output power and mode of operation of the PA; and

transmitting an output signal from the PA.

17. The method of claim 16 , wherein selecting the operating mode for the PA includes selecting a linear mode of operation when the baseband signal is converted to a modulated signal of varying amplitude and phase as an input to a PA and selecting a non-linear mode of operation when the baseband signal is converted to a constant amplitude signal for input to the PA and a modulated envelope is provided on a supply line to the PA for polar modulation.

18. The method of claim 17 , wherein transmitting the output signal from the PA transmits using EDGE protocol when in the linear mode of operation and GSM protocol when in the non-linear mode of operation.

19. The method of claim 17 , wherein selecting the device size includes using a look-up table to determine the device size.

20. The method of claim 17 , wherein selecting the biasing resistance value and impedance of the matching network includes using a look-up table to determine the biasing resistance value and the impedance.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 09/05/2018 PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0133. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0456 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0133 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2009
From: RAMACHANDRA REDDY, VIJAY
To: BROADCOM CORPORATION, A CALIFORNIA CORPORATION
Reel/Frame 023512/0790 →