IP Library Granted Patent US 8,350,332
Granted Patent B2
US 8,350,332 · App. 12/619,222 · Granted Jan 8, 2013

Semiconductor device and method of manufacturing the same

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 8,350,332
App. No.
12/619,222
Granted
Jan 8, 2013
Kind
B2
Abstract

A first and second gate electrodes are formed on a first and second active regions, respectively. The first and second gate electrodes have a first and second metal-containing conductive films, respectively. The first and second metal-containing conductive films are formed on the isolation region for segmenting the first and second active regions to be spaced apart from each other. A third metal-containing conductive film, which is a part of each of the first and second gate electrodes, is continuously formed from a top of the first metal-containing conductive film through a top of the isolation region to a top of the second metal-containing conductive film. The third metal-containing conductive film is in contact with the first and second metal-containing conductive films.

Claims (44)

1. A semiconductor device comprising:

a first gate electrode formed on a first active region in a semiconductor substrate, and having a first metal-containing conductive film;

a second gate electrode formed on a second active region in the semiconductor substrate, and having a second metal-containing conductive film; and

an isolation region formed in the semiconductor substrate to segment the first active region and the second active region, wherein

a third metal-containing conductive film, which is a part of each of the first gate electrode and the second gate electrode, is continuously formed from a top of the first metal-containing conductive film through a portion above the isolation region to a top of the second metal-containing conductive film,

the third metal-containing conductive film is made of a silicide, and is formed by fully siliciding a silicon film in a thickness direction,

the third metal-containing conductive film has a thickness greater than those of the first metal-containing conductive film and the second metal-containing conductive film, and

the silicon film remains at an end of the first metal-containing conductive film between the first metal-containing conductive film and the third metal-containing conductive film.

2. The device of claim 1 , wherein

the first metal-containing conductive film and the second metal-containing conductive film are formed on the isolation region to be spaced apart from each other, and

the third metal-containing conductive film is in contact with the isolation region.

3. The device of claim 2 , wherein the third metal-containing conductive film is formed to fill space on the isolation region and between the first metal-containing conductive film and the second metal-containing conductive film.

4. The device of claim 1 , wherein

the first metal-containing conductive film and the second metal-containing conductive film are formed on the isolation region to be spaced apart from each other, and

the silicon film remains between the third metal-containing conductive film and the isolation region.

5. The device of claim 1 , wherein the silicide includes Ti, Ni, Co, or Pt.

6. The device of claim 1 , further comprising:

a first high dielectric gate insulating film formed between the first active region and the first gate electrode; and

a second high dielectric gate insulating film formed between the second active region and the second gate electrode.

7. The device of claim 6 , wherein the first high dielectric gate insulating film and the second high dielectric gate insulating film include HfSiO.

8. The device of claim 6 , wherein the insulating sidewall spacer extends continuously from on a side surface of the first metal-containing conductive film to on a side surface of the first high dielectric gate insulating film.

9. The device of claim 1 , wherein

the first gate electrode is a gate electrode of an N-type MIS transistor, and

the first metal-containing conductive film is made of a material having a work function of 4.55 eV or less.

10. The device of claim 1 , wherein the first metal-containing conductive film is made of a material including at least one of a Ta compound and a Hf compound.

11. The device of claim 1 , wherein

the second gate electrode is a gate electrode of a P-type MIS transistor, and

the second metal-containing conductive film is made of a material having a work function of 4.65 eV or more.

12. The device of claim 1 , wherein the second metal-containing conductive film is made of a material including at least one of a Ti compound and a Ru compound.

13. The device of claim 1 , wherein the second metal-containing conductive film has substantially a same thickness as the first metal-containing conductive film.

14. The device of claim 1 , wherein the third metal-containing conductive film has a thickness five times or more as great as those of the first metal-containing conductive film and the second metal-containing conductive film.

15. The device of claim 14 , wherein the silicide includes Pt.

16. The device of claim 14 , wherein the silicide includes Ni and Pt.

17. The device of claim 1 , wherein the silicide includes Pt.

18. The device of claim 1 , wherein the silicide includes Ni and Pt.

19. The device of claim 1 , wherein the third metal-containing conductive film is directly in contact with the first metal-containing conductive film and the second metal-containing conductive film.

20. The device of claim 1 , wherein the first metal-containing conductive film includes metal not existing in the second metal-containing conductive film.

21. The device of claim 1 , wherein

the first gate electrode does not include the second metal-containing conductive film, and

the second gate electrode does not include the first metal-containing conductive film.

22. The device of claim 1 , wherein neither the first metal-containing conductive film nor the second metal-containing conductive film is a silicide.

23. The device of claim 1 , wherein neither the first metal-containing conductive film nor the second metal-containing conductive film includes silicon.

24. The device of claim 1 , wherein the third metal-containing conductive film directly contacts the first metal-containing conductive film.

25. The device of claim 24 , wherein the third metal-containing conductive film is a single layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2010
From: OOSUKA, TSUTOMU; SATO, YOSHIHIRO; OGAWA, HISASHI
To: PANASONIC CORPORATION
Reel/Frame 023797/0420 →
Priority Claims (1)
JP 2008-066543 · Mar 14, 2008 · national
Continuity (2)
Continuation PCTJP2009000184 · Jan 20, 2009
Related Publication 20100059827A1 · Mar 11, 2010