IP Library Granted Patent US 8,320,857
Granted Patent B2
US 8,320,857 · App. 12/620,020 · Granted Nov 27, 2012

Method and system for loop through for multi-band TV tuners and set-top box and/or TV set applications

Assignee: Broadcom Corporation
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Quick Facts
Patent No.
US 8,320,857
App. No.
12/620,020
Granted
Nov 27, 2012
Kind
B2
Abstract

Methods and systems for loop-through for multi-band TV tuners and set-top box and/or TV set applications are disclosed and may include generating master and slave output signals from one or more low-noise amplifiers including master and slave stages. The master and slave stages may include parallel-coupled gain paths. Gate terminals and source terminals of input transistors for the master and slave stages may be directly coupled. The input transistors for the master and slave stages may share an inductor coupled to the source terminals and to ground. The master and slave stages may include cascode stages. VHF and UHF signals may be amplified in the multi-band receiver. The generated master output signal may be processed in the multi-band receiver, and may be utilized to generate I and Q output signals. A plurality of the slave output signals may be summed and communicated to a receiver external to the multi-band receiver.

Claims (29)

1. A method for signal processing in a multi-band receiver, comprising:

generating a master output signal;

generating a slave output signal comprising a loop-through signal that is isolated from said master output signal, wherein said master output signal and said slave output signals are generated from a low-noise amplifier comprising master and slave stages, and wherein said master and slave stages comprise parallel-coupled gain paths; and

communicating a combined signal to a receiver, wherein said combined signal comprises said master output signal and said slave output signal.

2. The method according to claim 1 , wherein gate terminals of input transistors for said master and slave stages are directly coupled.

3. The method according to claim 1 , wherein source terminals of input transistors for said master and slave stages are directly coupled.

4. The method according to claim 3 , wherein said input transistors for said master and slave stages share an inductor coupled to said source terminals and to ground.

5. The method according to claim 1 , wherein said master and slave stages comprise cascade stages.

6. The method according to claim 1 , comprising amplifying VHF signals in said multi-band receiver.

7. The method according to claim 1 , comprising amplifying UHF signals in said multi-band receiver.

8. The method according to claim 1 , comprising processing said generated master output signal in said multi-band receiver.

9. The method according to claim 8 , comprising generating I and Q output signals from said processed master output signal in said multi-band receiver.

10. The method according to claim 1 , comprising summing a plurality of said slave output signals and communicating said sum to a receiver external to said multiband receiver.

11. The method according to claim 1 , comprising generating one or more outputs using one or more combined UHF low-noise amplifier outputs and one or more VHF- low-noise amplifier outputs utilizing a combiner.

12. The method according to claim 1 , wherein source terminals of said master and slaves stage share a common inductor.

13. A system for signal processing in a multi-band receiver, comprising:

a low-noise amplifier configured to generate a master output signal and a slave output signal comprising a loop-through signal, wherein said low-noise amplifier comprises master and slave stages, and wherein said master and slave stages comprise parallel-coupled gain paths, and said slave output is isolated from said master output signal; and

a combiner configured to output a combined signal to a receiver, wherein said combined signal comprises said master output signal and said slave output signal.

14. The system according to claim 13 , wherein gate terminals of input transistors for said master and slave stages are directly coupled.

15. The system according to claim 13 , wherein source terminals of input transistors for said master and slave stages are directly coupled.

16. The system, according to claim 15 , wherein said input transistors for said master and slave stages share an inductor coupled to said source terminals and to ground.

17. The system according to claim 13 , wherein said master and slave stages comprise cascade stages.

18. The system according to claim 13 , wherein said low-noise amplifier is configured to amplify VHF signals in said multi-band receiver.

19. The system according to claim 13 , wherein said low-noise amplifier is configure to amplify UHF signals in said multi-band receiver.

20. The system according to claim 13 , further coniprising a processor configured to process said generated master output signal in said multi-band receiver.

21. The system according to claim 20 , further comprising one or more circuits configured to generate I and Q output signals from said processed master output signal in said multi-band receiver.

22. The system according to claim 21 , wherein said one or more circuits are configured to sum a plurality of slave output signals and communicate said sum to a receiver external to said, multi-band receiver.

23. The system according to claim 13 , further comprising one or more circuits configured to generate one or more outputs using one or more combined UHF low-noise amplifier outputs and one or more VHF low-noise amplifier outputs utilizing said combiner.

24. The system according to claim 13 , wherein source terminals of said master and slave stages share common inductor.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 09/05/2018 PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0133. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0456 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0133 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2013
From: VASSILIOU, IASON
To: BROADCOM CORPORATION
Reel/Frame 030472/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2010
From: KYRANAS, ARISTEIDIS; PEYRAVI, HAMED; VAVELIDIS, KONSTANTINOS; KANAKARIS, NIKOLAOS
To: BROADCOM CORPORATION
Reel/Frame 023783/0643 →
Continuity (2)
Provisional Application 61169505 · Apr 15, 2009
Related Publication 20100265407A1 · Oct 21, 2010