IP Library Granted Patent US 8,331,114
Granted Patent B2
US 8,331,114 · App. 12/620,678 · Granted Dec 11, 2012

Flyback power converters having a high side driving circuit

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Quick Facts
Patent No.
US 8,331,114
App. No.
12/620,678
Granted
Dec 11, 2012
Kind
B2
Abstract

A dual-switch flyback power converter includes a control circuit to generate a switching signal. A high-side driving circuit includes a pulse generation circuit. The pulse generation circuit generates a pulse-on signal and a pulse-off signal to control two transistors in response to the switching signal. The two transistors further respectively provide a level-shift-on signal and a level-shift-off signal to a comparison circuit to enable/disable a high-side driving signal. Without using a charge pump circuit to power the high-side driving circuit, a floating winding of a transformer is utilized to provide a floating voltage to power the high-side driving circuit, which reduces the cost of the dual-switch flyback power converter and ensures a sufficient high-side driving capability of the high-side driving circuit.

Claims (38)

1. A flyback power converter, comprising:

a first transformer, for energy transfer;

a high-side transistor and a low-side transistor, coupled to switch said first transformer;

two diodes, coupled to said first transformer to circulate energy of a leakage inductance of said first transformer to an input power rail of said flyback power converter;

a first control circuit, generating a first switching signal to control said high-side transistor and said low-side transistor;

a high-side driving circuit, coupled to receive said first switching signal for driving said high-side transistor; and

a second control circuit and a second transformer, generating a floating voltage to power said high-side driving circuit,

wherein said second control circuit generates a second switching signal, and said second switching signal switches said second transformer for generating an auxiliary voltage to power said first control circuit, said second control circuit, and said high-side driving circuit.

2. The flyback power converter as claimed in claim 1 further comprising a low-side driving circuit coupled to receive said first switching signal for driving said low-side transistor, and said low-side driving circuit is powered by said auxiliary voltage.

3. The flyback power converter as claimed in claim 1 , wherein said high-side transistor and said low-side transistor are turned on/off simultaneously.

4. The flyback power converter as claimed in claim 1 , wherein said high-side driving circuit is a differential-mode level-shift circuit.

5. The flyback power converter as claimed in claim 1 , wherein said high-side driving circuit comprises:

a pulse generation circuit, generating a pulse-on signal and a pulse-off signal;

two transistors, coupled to respectively receive said pulse-on signal and said pulse-off signal for generating a level-shift-on signal and a level-shift-off signal by switching on said two transistors;

a comparison circuit, receiving said level-shift-on signal and said level-shift-off signal; and

a flip-flop, set and reset by said comparison circuit to generate a high-side driving signal for driving said high-side transistor;

wherein said comparison circuit and said flip-flop are powered by said floating voltage and a floating ground reference.

6. The flyback power converter as claimed in claim 5 , wherein the pulse widths of said pulse-on signal and said pulse-off signal are both shorter than 500 nsec.

7. The power converter as claimed in claim 5 , wherein said pulse-on signal and pulse-off signal are generated in response to said first switching signal.

8. A power converter comprising:

a transformer, for energy transfer;

a high-side transistor and a low-side transistor, coupled to switch said transformer;

two diodes, coupled to said transformer to circulate energy of a leakage inductance of said transformer to an input power rail of said power converter;

a control circuit, generating a switching signal to control said high-side transistor and said low-side transistor; and

a high-side driving circuit, coupled to receive said switching signal for driving said high-side transistor;

wherein said high-side driving circuit is powered by a floating voltage provided from a floating winding of said transformer.

9. The power converter as claimed in claim 8 further comprising a low-side driving circuit coupled to receive said switching signal for driving said low-side transistor.

10. The power converter as claimed in claim 9 , wherein an auxiliary winding of said transformer generates an auxiliary voltage to power said control circuit, said high-side driving circuit, and said low-side driving circuit.

11. The power converter as claimed in claim 8 , wherein said high-side transistor and said low-side transistor are turned on/off simultaneously.

12. The power converter as claimed in claim 8 , wherein said high-side driving circuit is a differential-mode level-shift circuit.

13. The power converter as claimed in claim 8 , wherein said high-side driving circuit comprises:

a pulse generation circuit, generating a pulse-on signal and a pulse-off signal;

two transistors, coupled to respectively receive said pulse-on signal and said pulse-off signal for generating a level-shift-on signal and a level-shift-off signal by switching on said two transistors;

a comparison circuit, receiving said level-shift-on signal and said level-shift-off signal; and

a flip-flop, set and reset by said comparison circuit to generate a high-side driving signal for driving said high-side transistor;

wherein said comparison circuit and said flip-flop are powered by said floating voltage and a floating ground reference.

14. The power converter as claimed in claim 13 , wherein the pulse width of said pulse-on signal and said pulse-off signal are both shorter than 500 nsec.

15. The power converter as claimed in claim 13 , wherein said pulse-on signal and the pulse-off signal are generated in response to said switching signal.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2017
From: FAIRCHILD (TAIWAN) CORPORATION (FORMERLY SYSTEM GENERAL CORPORATION)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042328/0318 →
CHANGE OF NAME Recorded May 3, 2016
From: SYSTEM GENERAL CORPORATION
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 038599/0043 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2009
From: YANG, TA-YUNG; YANG, SHIH-JEN; LEE, MING-HSUAN; CHANG, JIAN
To: SYSTEM GENERAL CORPORATION
Reel/Frame 023533/0651 →