Systems and methods for offset cancellation method for DC-coupled audio drivers
View Patent ↗Direct current (DC) offset in and audio driver can cause a constant drain on power even when there is no sound. Furthermore it can cause an audible pop when the audio driver is enabled. A scaled replica output stage can be employed to perform DC offset cancellation offline during a sampling phase. Once DC offset cancellation is achieved, the audio driver uses a full scale output stage during the operation phase.
1. An audio driver comprising:
an input stage operable to receive and amplify an analog sound signal;
an output stage having an audio output for driving a load;
a replica output stage coupled to the amplifier to receive the amplified analog signal and having a replica audio output;
a first switch operable to selectively connect the output stage and the amplifier during an operation phase and disconnect the output stage and the amplifier during a sampling phase; and
an auto-zeroing circuit coupled to the replica output stage to receive the replica audio output and adjust the input stage to zero out any DC offset detected in the replica audio output utilizing a comparator to compare the replica audio output to a reference voltage.
2. The audio driver of claim 1 wherein the output stage is operable to receive a control signal to put the output stage into a high impedance mode.
3. The audio driver of claim 1 wherein the output stage comprises a first n-type field effect transistor (NFET) and a first p-type field effect transistor (PFET).
4. The audio driver of claim 3 further comprising:
a second switch connecting the gate of the first NFET to a high supply voltage rail; and
a third switch connecting the gate of the first PFET to a low supply voltage rail;
wherein the second switch and the third switch are closed during the sampling phase and opened during the operation phase.
5. The audio driver of claim 3 wherein the replica output stage comprises a second NFET and a second PFET, wherein the second NFET is smaller than the first NFET and the second PFET is smaller than the first PFET.
6. The audio driver of claim 1 further comprising:
a second switch connecting the output of the output stage to a low supply voltage rail, wherein the second switch is closed during the sampling phase and opened during the operation phase.
7. The audio driver of claim 1 wherein the auto-zeroing circuit comprises:
the comparator comparing the output of the replica output stage to a low supply voltage; and
a successive approximation register (SAR) logic.
8. The audio driver of claim 1 wherein the auto-zeroing circuit further comprises a low-pass filter.
9. The audio driver of claim 1 wherein the amplifier is a class AB amplifier having a first output and a second output coupled to the output stage and replica output stage; wherein the first output is coupled to the output stage with the first switch and the second output is coupled to the output stage with the second switch.
10. The audio driver of claim 1 wherein the amplifier is a differential amplifier having a first output and a second output coupled to the output stage and replica output stage; wherein the first output is coupled to the output stage with the first switch and the second output is coupled to the output stage with the second switch.
11. The audio driver of claim 10 further comprising a third switch coupling the output of the output stage to a second output of the output stage, wherein the third switch is closed during the sampling phase and open during the operation phase.
12. The audio driver of claim 10 wherein the auto-zeroing circuit comprises:
the comparator comparing the output of the replica output stage to a second output of the replica output stage; and
a successive approximation register (SAR) logic.
13. The audio driver of claim 12 wherein the auto-zeroing circuit further comprises a low-pass filter.
14. A method of cancellation of a DC offset in an audio driver comprising:
disconnecting an output stage of the audio driver from an amplifier and connecting an output of said output stage to a low supply voltage rail;
auto-zeroing an output of a replica output stage;
connecting the output stage to the amplifier and disconnecting said output of said output stage from said low voltage rail.
15. The method of claim 14 further comprising:
configuring the output stage into a high impedance state during the auto-zeroing.
16. The method of claim 14 wherein the auto-zeroing comprises:
comparing the output of the replica stage to a voltage provided by a low supply voltage rail;
adjusting a SAR logic on the basis of comparing the output to the voltage;
repeating the comparing and the adjusting until the DC offset is cancelled; and
freezing the SAR logic.
17. The method of claim 16 further comprising low-pass filtering input signals to the SAR logic.
18. An audio driver comprising:
a digital to analog converter (DAC) having an input operable to receive an digital sound signal and produce a analog sound signal;
an amplifier operable to amplify the analog sound signal;
an output stage having an output;
a replica output stage having an output coupled to the amplifier;
a means for disconnecting and connecting the amplifier to the output stage; and
a means for auto-zeroing the output of the replica output stage by comparing the output of the replica output stage to a voltage provided by a low supply voltage rail.
19. The audio driver of claim 18 , wherein the means for auto-zeroing further comprises:
a means for adjusting a successive approximation register (SAR) logic; and
a means for freezing a SAR logic.
20. An audio driver comprising:
an input stage operable to receive and amplify an analog sound signal;
an output stage having:
an audio output for driving a load;
a first n-type field effect transistor (NFET), a second switch connecting the gate of the first NFET to a high supply voltage rail; and
a first p-type field effect transistor (PFET), a third switch connecting the gate of the first PFET to a low supply voltage rail;
a replica output stage coupled to the amplifier to receive the amplified analog signal and having a replica audio output;
a first switch operable to selectively connect the output stage and the amplifier during an operation phase and disconnect the output stage and the amplifier during a sampling phase; and
an auto-zeroing circuit coupled to the replica output stage to receive the replica audio output and adjust the input stage to zero out any DC offset detected in the replica audio output;
wherein the second switch and the third switch are closed during the sampling phase and opened during the operation phase.
21. An audio driver comprising:
an input stage operable to receive and amplify an analog sound signal;
an output stage having:
an audio output for driving a load;
a first n-type field effect transistor (NFET); and
a first p-type field effect transistor (PFET);
a replica output stage coupled to the amplifier to receive the amplified analog signal and having a replica audio output, wherein the replica output stage comprises a second NFET and a second PFET, wherein the second NFET is smaller than the first NFET and the second PFET is smaller than the first PFET;
a first switch operable to selectively connect the output stage and the amplifier during an operation phase and disconnect the output stage and the amplifier during a sampling phase; and
an auto-zeroing circuit coupled to the replica output stage to receive the replica audio output and adjust the input stage to zero out any DC offset detected in the replica audio output.
22. An audio driver comprising:
an input stage operable to receive and amplify an analog sound signal;
an output stage having an audio output for driving a load;
a replica output stage coupled to the amplifier to receive the amplified analog signal and having a replica audio output;
a first switch operable to selectively connect the output stage and the amplifier during an operation phase and disconnect the output stage and the amplifier during a sampling phase;
an auto-zeroing circuit coupled to the replica output stage to receive the replica audio output and adjust the input stage to zero out any DC offset detected in the replica audio output; and
a second switch connecting the output of the output stage to a low supply voltage rail, wherein the second switch is closed during the sampling phase and opened during the operation phase.
23. An audio driver comprising:
an input stage operable to receive and amplify an analog sound signal;
an output stage having an audio output for driving a load;
a replica output stage coupled to the amplifier to receive the amplified analog signal and having a replica audio output;
a first switch operable to selectively connect the output stage and the amplifier during an operation phase and disconnect the output stage and the amplifier during a sampling phase; and
an auto-zeroing circuit coupled to the replica output stage to receive the replica audio output and adjust the input stage to zero out any DC offset detected in the replica audio output, the auto-zeroing circuit including:
a comparator comparing the output of the replica output stage to a low supply voltage; and
a successive approximation register (SAR) logic.
24. An audio driver comprising:
an input stage operable to receive and amplify an analog sound signal;
an output stage having an audio output for driving a load;
a replica output stage coupled to the amplifier to receive the amplified analog signal and having a replica audio output;
a first switch operable to selectively connect the output stage and the amplifier during an operation phase and disconnect the output stage and the amplifier during a sampling phase; and
an auto-zeroing circuit coupled to the replica output stage to receive the replica audio output and adjust the input stage to zero out any DC offset detected in the replica audio output, the auto-zeroing circuit including a low-pass filter.
25. A method of cancellation of a DC offset in an audio driver comprising:
disconnecting an output stage of the audio driver from an amplifier;
auto-zeroing an output of a replica output stage, the auto-zeroing including:
comparing the output of the replica stage to a voltage provided by a low supply voltage rail;
adjusting a SAR logic on the basis of comparing the output to the voltage;
repeating the comparing and the adjusting until the DC offset is cancelled;
freezing the SAR logic;
connecting the output stage to the amplifier.