Methods and systems for calibrating a pipelined analog-to-digital converter

1. A method for increasing accuracy of a pipelined analog-to-digital converter comprising a plurality of stages, each stage comprising an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC), said method comprising:

calibrating each said ADC starting from a least significant stage until all ADCs have been calibrated using a reference digital-to-analog converter, said reference digital-to-analog converter selectively outputting values at desired trip points for each said ADC;

measuring an output of each said DAC using downstream stages of said pipelined analog-to-digital converter to produce output measurements; and

using said output measurements to calculate an error-corrected output of said pipelined analog-to-digital converter,

in which said trip points are adjusted by modifying a reference current input to a comparator of each said ADC.

2. The method of claim 1 , further comprising:

storing information from said output measurements in a look-up table; and

generating a signal for correcting said output of said pipelined analog-to-digital converter using said look-up table.

3. The method of claim 2 , wherein said signal for correcting said output of said pipelined analog-to-digital converter is a digital signal.

4. The method of claim 1 , wherein said pipelined analog-to-digital converter is a current mode pipelined analog-to-digital converter.

5. A pipelined analog-to-digital converter comprising:

a plurality of stages, each stage comprising an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC); and

a look-up table containing data representing output values for each of said DACs;

in which trip points of said ADCs in said stages of said pipelined converter have been calibrated to expected values,

in which each of said ADCs in said stages of said pipelined converter comprise comparators with reference inputs adjusted to calibrate said trip points.

6. The converter of claim 5 , in which said reference inputs adjusted to calibrate said trip points are current sources.

7. The converter of claim 5 , wherein each of said ADCs in said stages of said pipelined converter comprise current mini-DACs adjusted to calibrate said trip points.

8. The converter of claim 5 , wherein said pipelined analog-to-digital converter is a current mode pipelined analog-to-digital converter.

9. The converter of claim 5 , further comprising a reference DAC for outputting reference signals to said ADCs in said stages of said pipelined converter to generate the data stored in said look-up table.

10. The converter of claim 9 , wherein:

an output of said reference DAC is summed with an output from a said DAC of a particular stage of said pipelined converter and an input to that DAC is stepped to enable measurement of a size of a DAC step for that DAC; and

a look-up table entry for said DAC step comprises a sum of a measured value of said DAC step and a previously measured value for said DAC step.

11. A pipelined analog-to-digital converter comprising a plurality of stages, said pipelined analog-to-digital converter further comprising:

at least one stage comprising an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC); and

a look-up table containing data representing output values for said DACs;

in which a trip point of an ADC in said at least one stage of said pipelined converter has been calibrated to an expected value,

in which said ADC in said at least one stage of said pipelined converter comprises a comparator with reference input adjusted to calibrate said trip point.