Low noise reference circuit of improving frequency variation of ring oscillator
View Patent ↗A low noise reference voltage circuit without using an amplifier inside is capable of transforming a current I PTAT in positive proportion to absolute temperature into a voltage V PTAT in positive proportion to absolute temperature, and outputting it to a ring oscillator. The low noise reference voltage circuit improves a degradation of noise performance compared with a conventional band-gap reference voltage circuit and is in characteristic of low noise and higher PSRR.
1. A low noise reference voltage circuit for improving the frequency variation of a ring oscillator, comprising:
a PTAT (proportional to absolute temperature) current generating unit configured to generate
a PTAT current in positive proportion to absolute temperature;
a PTAT voltage transforming unit configured to transform the PTAT current into a PTAT voltage and to output the PTAT voltage to a linear regulator, wherein the PTAT voltage transforming unit includes a transistor of a current mirror; and
a power supply rejection ratio (PSRR) improving resistor connected to one terminal of the transistor and configured to improve the variation of a power voltage.
2. The low noise reference voltage circuit as claimed in claim 1 , wherein the PTAT current generating unit comprises:
a first degeneration resistor, wherein one terminal of the first degeneration resistor is connected to the power voltage;
a second degeneration resistor, wherein one terminal of the second degeneration resistor is connected to the power voltage;
a first positive channel metal oxide semiconductor (PMOS), wherein one terminal of the first PMOS is connected to the first degeneration resistor; and
a second PMOS, wherein one terminal of the second PMOS is connected to the second degeneration resistor, and the first PMOS and the second PMOS form another current mirror;
wherein, one terminal of a first negative channel metal oxide semiconductor (NMOS) is connected to another terminal of the first PMOS, and another terminal of the first NMOS is connected to a ground power through a resistor, and one terminal of a second NMOS is connected to another terminal of the second PMOS.
3. The low noise reference voltage circuit as claimed in claim 2 , wherein a drain of the second NMOS is connected to an inverting terminal of an operation amplifier of a linear regulator.
4. The low noise reference voltage circuit as claimed in claim 2 or 3 , wherein the PSRR improving resistor is connected between another terminal of the second PMOS and the drain of the second NMOS.
5. The low noise reference voltage circuit as claimed in claim 4 , wherein the resistance value of PSRR improving resistor is determined by a reciprocal of the electrical conductivity of the second NMOS.