IP Library Granted Patent US 8,008,662
Granted Patent B2
US 8,008,662 · App. 12/626,587 · Granted Aug 30, 2011

Display substrate and method of manufacturing the same

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Quick Facts
Patent No.
US 8,008,662
App. No.
12/626,587
Granted
Aug 30, 2011
Kind
B2
Abstract

A display substrate having a low-resistance metallic layer and a method of manufacturing the display substrate. The gate conductors are extended in a first direction. The source conductors are extended in a second direction crossing the first direction including a lower layer of molybdenum or a molybdenum alloy, and an upper layer of aluminum or an aluminum alloy. The pixel areas are defined by the gate conductors and the source conductors. A switching element is formed in each of the pixel areas and includes a gate electrode extended from the gate conductor and a source electrode extended from the source conductor. The pixel electrode includes a transparent conductive material, and is electrically connected to a drain electrode of the switching element.

Claims (28)

1. A display substrate comprising:

a plurality of gate conductors extended in a first direction;

a plurality of source conductors extended in a second direction crossing the first direction, each of the source conductors including a first lower layer of molybdenum or a molybdenum alloy and a first upper layer of aluminum or an aluminum alloy;

a plurality of pixel areas defined by the gate conductors and the source conductors;

a switching element formed in each pixel area, the switching element including a gate electrode extended from one of the gate conductors and a source electrode extended from one of the source conductors; and

a pixel electrode electrically connected to a drain electrode of the switching element, the pixel electrode including a transparent conductive material.

2. The display substrate of claim 1 , wherein the lower layer is formed to a thickness between about 500 {acute over (Å)} and about 1,500 {acute over (Å)}.

3. The display substrate of claim 1 , wherein the pixel electrode is electrically connected to the drain electrode through a side area of the drain electrode.

4. The display substrate of claim 1 , further comprising a source pad formed on a first end area of each of the source conductors and receiving a source signal.

5. The display substrate of claim 4 , wherein the source pad comprises:

a source end area pattern extended from the source conductor; and

a source pad pattern including a transparent conductive material and electrically connected to a side area of the source end area pattern by a first contact hole.

6. The display substrate of claim 1 , wherein the gate conductors comprise:

a second lower layer including molybdenum or a molybdenum alloy; and a second upper layer including aluminum or an aluminum alloy.

7. The display substrate of claim 6 , wherein the thickness of the second lower layer is between about 500 {acute over (Å)} and about 1,500 {acute over (Å)}.

8. The display substrate of claim 6 , further comprising a gate pad formed in the first end area of each of the gate conductors to receive the gate signal.

9. The display substrate of claim 8 , wherein the gate pad comprises:

a gate end area pattern extended from each of the gate conductors; and

a gate pad pattern including a transparent conductive material, and electrically connected to a side area of the gate end area pattern through a second contact hole.

10. The display substrate of claim 6 , wherein the pixel area further comprises a storage common electrode including the second lower layer and the second upper layer.

11. The display substrate of claim 9 , further comprising a protective insulating layer surrounding a side portion of the gate end area pattern and defining the second contact hole,

wherein the gate pad pattern contacts with a side area of the protective insulating layer in the second contact hole.

12. The display substrate of claim 1 , wherein the pixel area further comprises a storage common electrode, an active layer and an ohmic contact layer which are formed on the storage common electrode.

13. The display substrate of claim 12 , wherein the pixel electrode contacts with the active and ohmic layers formed on the storage common electrode.

14. The display substrate of claim 1 , further comprising a protective insulating layer formed on the source electrode and the drain electrode, wherein the pixel electrode contacts with a side area of the protective insulating layer formed on the drain electrode.

15. The display substrate of claim 14 , the pixel electrode directly contacts with a substrate of the pixel area.

16. The display substrate of claim 5 , further comprising a protective insulating layer surrounding a side portion of the source end area pattern and defining the first contact hole,

wherein the source pad pattern contacts with a side area of the protective insulating layer in the first contact hole.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029016/0057 →