Digital control of PWM converters with nonlinear gain scheduling

1. A digital pulse-width modulation (DPWM) control system comprising:

a power stage for converting voltage comprising:

an input voltage port;

an output voltage port; and

an input control port for receiving a DPWM control waveform;

an error sampling block operatively coupled to the output voltage port of the power stage and comprising:

an analog-to-digital converter; and

an error comparison circuit;

wherein the error sampling block is adapted to output a digitized error signal representing a voltage difference between the output voltage of the power stage and a reference voltage;

a gain scheduling block adapted to apply a non-linear gain to the digitized error signal from the error comparison circuit to produce a gain-scheduled error signal;

a compensator filter for filtering the gain-scheduled error signal; and

a digital PWM module configured to receive the filtered gain-scheduled error signal and to output a DPWM control waveform that is operatively coupled to the input control port of the power stage; wherein the gain scheduling block is further adapted to apply a non-linear gain having a profile that:

increases slowly with input amplitude for small input amplitudes;

increases quickly with input amplitude for medium input amplitudes; and

increases slowly with input amplitude for large input amplitudes.

2. The DPWM control system of claim 1 , wherein the power stage is further adapted to include a power switching element and a filter element;

wherein the filter element is operatively coupled to the output voltage port; and

wherein the power switching element is adapted to selectively connect the input voltage port to the filter element.

3. The DPWM control system of claim 1 , wherein error sampling block is further configured such that:

the error comparison circuit performs an analog comparison of the output voltage of the power stage and the reference voltage to produce a difference voltage; and

the ADC digitizes the difference voltage to produce the digitized error signal.

4. The DPWM control system of claim 1 , wherein error sampling block is further configured such that:

the ADC digitizes the output voltage of the power stage to produce a digital output voltage; and

the error comparison circuit calculates a difference between the digital output voltage and the reference voltage to produce the digitized error signal.

5. The DPWM control system of claim 1 , wherein the compensator filter has a response function given by d[n]=d[n−1]+b 0 *e[n]−b 1 *e[n−1]+b 2 *e[n−2], wherein:

d[n] is an output of the compensator filter at a current sample time t;

d[n−1] is the output of the compensator filter a sample time t−1;

e[n] is the gain-scheduled error signal at the current sample time t;

e[n−1] is the gain-scheduled error signal at the sample time t−1;

e[n−2] is the gain-scheduled error signal at a sample time t−2;

b 0 is a first filter coefficient;

b 1 is a second filter coefficient; and

b 2 is a third filter coefficient.

6. The DPWM control system of claim 5 , wherein the first, second, and third filter coefficients are programmable.

7. A digital pulse-width modulation (DPWM) control system comprising:

a power stage for converting voltage comprising:

an input voltage port;

an output voltage port; and

an input control port for receiving a DPWM control waveform;

an error sampling block operatively coupled to the output voltage port of the power stage and comprising:

an analog-to-digital converter; and

an error comparison circuit;

wherein the error sampling block is adapted to output a digitized error signal representing a voltage difference between the output voltage of the power stage and a reference voltage;

a gain scheduling block adapted to apply a non-linear gain to the digitized error signal from the error comparison circuit to produce a gain-scheduled error signal;

a compensator filter for filtering the gain-scheduled error signal; and

a digital PWM module configured to receive the filtered gain-scheduled error signal and to output a DPWM control waveform that is operatively coupled to the input control port of the power stage; wherein the gain scheduling block is further adapted to apply a non-linear gain having a profile that:

increases linearly with a slope of α 1 for input amplitudes less than a 1 ;

increases linearly with a slope of α 2 for input amplitudes between and including a 1 and a 2 ; and

increases linearly with a slope of α 3 for input amplitudes greater than a 2 ; wherein:

α 1 is less than or equal to α 2 ;

α 2 is greater than or equal to α 3 ; and

a 1 is less than a 2 .

8. A digital pulse-width modulation (DPWM) control system comprising:

a power stage for converting voltage comprising:

an input voltage port;

an output voltage port; and

an input control port for receiving a DPWM control waveform;

an error sampling block operatively coupled to the output voltage port of the power stage and comprising:

an analog-to-digital converter; and

an error comparison circuit;

wherein the error sampling block is adapted to output a digitized error signal representing a voltage difference between the output voltage of the power stage and a reference voltage;

a gain scheduling block adapted to apply a non-linear gain to the digitized error signal from the error comparison circuit to produce a gain-scheduled error signal;

a compensator filter for filtering the gain-scheduled error signal; and

a digital PWM module configured to receive the filtered gain-scheduled error signal and to output a DPWM control waveform that is operatively coupled to the input control port of the power stage; wherein the gain scheduling block is further adapted to apply a non-linear gain having a profile that:

is equal to zero for input amplitudes less than a 1 ; and

increases linearly for input amplitudes greater than or equal to a 1 .

9. A digital pulse-width modulation (DPWM) control system comprising:

a power stage for converting voltage comprising:

an input voltage port;

an output voltage port; and

an input control port for receiving a DPWM control waveform;

an error sampling block operatively coupled to the output voltage port of the power stage and comprising:

an analog-to-digital converter; and

an error comparison circuit;

wherein the error sampling block is adapted to output a digitized error signal representing a voltage difference between the output voltage of the power stage and a reference voltage;

a gain scheduling block adapted to apply a non-linear gain to the digitized error signal from the error comparison circuit to produce a gain-scheduled error signal;

a compensator filter for filtering the gain-scheduled error signal; and

a digital PWM module configured to receive the filtered gain-scheduled error signal and to output a DPWM control waveform that is operatively coupled to the input control port of the power stage; wherein the gain scheduling block is further adapted to apply a non-linear gain having a profile that:

increases linearly with a slope of α 1 for input amplitudes less than a 1 ; and

remains constant at a gain of α 1 *a 1 for amplitudes greater than or equal to a 1 .

10. A power conversion system comprising:

a switching converter comprising:

an input voltage port;

an output voltage port;

an output filter operatively connected to the output voltage port; and

a switch element for selectively connecting the input voltage port to the output filter;

an error circuit adapted to produce a voltage corresponding to a difference between the output voltage of the switching converter and a reference voltage;

an analog-to-digital converter (ADC) adapted to digitize the difference voltage produced by the error circuit to produce a digital error sample;

a gain scheduling block adapted to scale the digital error sample by a non-linear gain function to produce a gain-scheduled error signal, wherein the non-linear gain function comprises a piecewise linear function having at least a first slope and a second slope, wherein the non-linear gain function increases slowly with input amplitude for small input amplitudes, increases quickly with input amplitude for medium input amplitudes, and increases slowly with input amplitude for large input amplitudes;

a compensator filter for filtering the gain-scheduled error signal; and

a digital pulse width modulation module configured to receive the filtered gain-scheduled error signal and to generate a control waveform that is operatively coupled to the switch element of the switching converter.

11. The power conversion system of claim 10 , wherein the second slope of the piecewise linear function of the gain scheduling block is greater than the first slope of the piecewise linear function of the gain scheduling block.

12. The power conversion system of claim 11 , wherein the first slope of the piecewise linear function of the gain scheduling block is equal to zero.

13. The power conversion system of claim 10 , wherein the piecewise linear function of the gain scheduling block further includes a third slope such that the first slope is less than the second slope and the third slope is less than the second slope.

14. The power conversion system of claim 10 , wherein the compensator filter has a response function given by d[n]=d[n−1]+b 0 *e[n]−b 1 *e[n−1]+b 2 *e[n−2], wherein:

d[n] is an output of the compensator filter at a current sample time t;

d[n−1] is the output of the compensator filter a sample time t−1;

e[n] is the gain-scheduled error signal at the current sample time t;

e[n−1] is the gain-scheduled error signal at the sample time t−1;

e[n−2] is the gain-scheduled error signal at a sample time t−2;

b 0 is a first filter coefficient;

b 1 is a second filter coefficient; and

b 2 is a third filter coefficient.

15. The DPWM control system of claim 14 , wherein the first, second, and third filter coefficients are programmable.

16. In a digital pulse-width-modulator-controlled power system including a switching power converter, an analog-to-digital converter, a compensator filter, and a digital pulse-width modulator, a method of controlling an output voltage of the switching power converter comprises the steps of:

comparing the output voltage of the switching power converter to a reference voltage to create a difference error signal;

digitizing the difference error signal with the analog-to-digital converter to create a plurality of digital error samples;

applying a non-linear gain scheduling function to the plurality of digital error samples to produce a plurality of gain-scheduled error samples;

filtering the plurality of gain-scheduled error samples to produce a pulse-width-modulator driving signal;

driving the digital pulse width modulator with the pulse-width modulator driving signal to produce a switching waveform; and

operatively coupling the switching waveform to the switching power converter;

wherein the output voltage of the switching power converter is controlled such that it tracks the reference voltage; and wherein the step of applying a non-linear gain scheduling function to the plurality of digital error samples further comprises:

applying a gain that increases linearly with a slope of α 1 to ones of the plurality of error samples having amplitudes less than a 1 ;

applying a gain that increases linearly with a slope of α 2 to ones of the plurality of error samples having amplitudes between and including a 1 and a 2 ; and

applying a gain that increases linearly with a slope of α 3 to ones of the plurality of error samples having amplitudes greater than a 2 , wherein:

α 1 is less than or equal to α 2 ;

α 2 is greater than or equal to α 3 ; and

a 1 is less than a 2 .

17. The method of controlling an output voltage of the switching power converter of claim 16 , wherein the step of filtering the plurality of gain-scheduled error samples further includes applying a response function characterized by d[n]=d[n−1]+b 0 *e[n]−b 1 *e[n−1]+b 2 *e[n−2], wherein:

d[n] is the pulse-width modulator driving signal at a current sample time t;

d[n−1] is the pulse-width modulator driving signal at sample time t−1;

e[n] is the gain-scheduled error sample at the current sample time t;

e[n−1] is the gain-scheduled error sample at the sample time t−1;

e[n−2] is the gain-scheduled error sample at a sample time t−2;

b 0 is a first filter coefficient;

b 1 is a second filter coefficient; and

b 2 is a third filter coefficient.

18. In a digital pulse-width-modulator-controlled power system including a switching power converter, an analog-to-digital converter, a compensator filter, and a digital pulse-width modulator, a method of controlling an output voltage of the switching power converter comprises the steps of:

comparing the output voltage of the switching power converter to a reference voltage to create a difference error signal;

digitizing the difference error signal with the analog-to-digital converter to create a plurality of digital error samples;

applying a non-linear gain scheduling function to the plurality of digital error samples to produce a plurality of gain-scheduled error samples;

filtering the plurality of gain-scheduled error samples to produce a pulse-width-modulator driving signal;

driving the digital pulse width modulator with the pulse-width modulator driving signal to produce a switching waveform; and

operatively coupling the switching waveform to the switching power converter;

wherein the output voltage of the switching power converter is controlled such that it tracks the reference voltage; and wherein the step of applying a non-linear gain scheduling function to the plurality of digital error samples further comprises:

applying a gain of zero to ones of the plurality of error samples having amplitudes less than a 1 ; and

applying a gain that increases linearly to ones of the plurality of error samples having amplitudes greater than or equal to a 1 .

19. In a digital pulse-width-modulator-controlled power system including a switching power converter, an analog-to-digital converter, a compensator filter, and a digital pulse-width modulator, a method of controlling an output voltage of the switching power converter comprises the steps of:

comparing the output voltage of the switching power converter to a reference voltage to create a difference error signal;

digitizing the difference error signal with the analog-to-digital converter to create a plurality of digital error samples;

applying a non-linear gain scheduling function to the plurality of digital error samples to produce a plurality of gain-scheduled error samples;

filtering the plurality of gain-scheduled error samples to produce a pulse-width-modulator driving signal;

driving the digital pulse width modulator with the pulse-width modulator driving signal to produce a switching waveform; and

operatively coupling the switching waveform to the switching power converter;

wherein the output voltage of the switching power converter is controlled such that it tracks the reference voltage; and wherein the step of applying a non-linear gain scheduling function to the plurality of digital error samples further comprises:

applying a gain that increases linearly with a slope of α 1 to ones of the plurality of error samples having amplitudes less than a 1 ; and

applying a constant gain equal to α 1 *a 1 to ones of the plurality of error samples having amplitudes less than a 1 .