IP Library Granted Patent US 8,114,749
Granted Patent B2
US 8,114,749 · App. 12/630,930 · Granted Feb 14, 2012

Method of fabricating high voltage device

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Quick Facts
Patent No.
US 8,114,749
App. No.
12/630,930
Granted
Feb 14, 2012
Kind
B2
Abstract

A device for protecting a semiconductor device from electrostatic discharge may include a high voltage first conductivity type well formed in a semiconductor substrate. A first stack region may have a first conductivity type drift region, and a first conductivity type impurity region stacked in succession in the high voltage first conductivity type well. A second stack region may have a second conductivity type drift region, and a second conductivity type impurity region stacked in succession in the high voltage first conductivity type well. A device isolating film formed between the first stack region and the second stack region for isolating the first stack region from the second stack region.

Claims (16)

1. A method for fabricating a high voltage device, comprising:

forming a high voltage first conductivity type well by injecting first conductivity type impurities into a semiconductor substrate;

forming a first stack region having a first conductivity type drift region and a first conductivity type impurity region stacked in succession in the high voltage first conductivity type well by injecting first conductivity type impurities into the first stack region of the high voltage first conductivity type well;

forming a second stack region having a second conductivity type drift region and a second conductivity type impurity region stacked in succession in the high voltage first conductivity type well by injecting second conductivity type impurities into the high voltage first conductivity type well; and

forming a device isolation film between the first stack region and the second stack region for isolating the first stack region from the second stack region, wherein the device isolating film in the high voltage first conductivity type well is deeper than the first stack region and the second stack region.

2. The method of claim 1 , wherein the step for forming a first stack region includes forming a first conductivity type drift region by injecting first conductivity type impurities into the high voltage first conductivity type well.

3. The method of claim 2 , wherein the step for forming a first stack region includes forming a first conductivity type impurity region by injecting first conductivity type impurities into the first conductivity type drift region.

4. The method of claim 1 , wherein the step for forming a first stack region includes the step of forming the high voltage first conductivity type well under the first conductivity type drift region by injecting first conductivity type impurities into the high voltage first conductivity type well.

5. The method of claim 4 , wherein the step for forming a first stack region includes the step of forming the high voltage first conductivity type well under the first conductivity type drift region by injecting first conductivity type impurities into the high voltage first conductivity type well.

6. The method of claim 1 , wherein the step for forming a device isolation film includes forming the device isolation film in the high voltage first conductivity type well deeper than the first conductivity type drift region.

7. The method of claim 1 , wherein the step for forming a device isolation film includes forming the device isolation film in the high voltage first conductivity type well shallower than the high voltage first conductivity type well.

8. The method of claim 1 , wherein the second conduction type impurity region is a cathode region of a diode.

9. The method of claim 8 , wherein the first conductivity type impurity region is an anode region of a diode.

10. The method of claim 9 , wherein the diode is capable of protecting a semiconductor device from electrostatic discharge.

11. The method of claim 9 , wherein the high voltage first conductivity type well has an impurity concentration lower than an impurity concentration of the first conductivity type drift region, and the first conductivity type drift region has an impurity concentration lower than an impurity concentration of the first conductivity impurity region.

12. The method of claim 1 , wherein the first conductivity type is P type and the second conductivity type is N type, or the first conductivity type is N type and the second conductivity type is P type.

Assignments (2)
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD.
Reel/Frame 044559/0819 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2009
From: JANG, JOON-TAE
To: DONGBU HITEK CO., LTD.
Reel/Frame 023604/0798 →