Systems and methods for charging a battery with a digital charge reduction loop
View Patent ↗Exemplary systems and methods for charging a battery with a digital charge reduction loop are described herein. In some embodiments, a system comprises an exemplary digital charge reduction loop which comprises a circuit for determining a charge-current adjustment signal, a counter for generating a digital count value, and a digital-to-analog converter. The circuit for determining a charge-current adjustment signal may base the determination on a source voltage of an input source. The counter may generate a digital count value based on the charge-current adjustment signal. The digital-to-analog converter (DAC) may generate a DAC control signal based on the digital count value of the counter, the DAC control signal being representative of an amount of charge current to be used to charge a battery.
1. A system comprising:
a digital charge reduction loop comprising:
a circuit for determining a charge-current adjustment signal based on a source voltage of an input source;
a counter for generating a digital count value based on the charge-current adjustment signal; and
a digital-to-analog converter (DAC) for generating a DAC control signal based on the digital count value of the counter, the DAC control signal being representative of an amount of charge current to be used to charge a battery;
a charge-current control circuit for receiving a charge-current control signal to control an amount of charge current being drawn from the input source;
an analog control circuit for generating an analog control signal representative of a maximum amount of charge current to be used to charge the batter; and
a switching mechanism for selecting one of the analog control signal or the DAC control signal, the selected control signal being used as the charge-current control signal to the charge-current control circuit.
2. The system of claim 1 , wherein the circuit for determining the charge-current adjustment signal comprises:
a first comparator for comparing a first voltage based on the source voltage against a reference voltage to generate a first comparator output signal, the first comparator output signal being for controlling the counter; and
a second comparator for comparing a second voltage based on the source voltage against the reference voltage to generate a second comparator output signal, the second comparator output signal being for controlling a switching mechanism.
3. The system of claim 2 , wherein the counter is operative to count up when the first comparator output signal is a logical high value.
4. The system of claim 2 , wherein the counter is operative to count down when the first comparator output signal is a logical low value.
5. The system of claim 1 , wherein the digital charge reduction loop further comprises a clock oscillator for generating a clock signal, and wherein the counter is operative to modify the digital count value in coordination with the clock signal.
6. The system of claim 1 , wherein the circuit for determining the charge-current adjustment signal includes a comparator for comparing a first voltage based on the source voltage against a reference voltage to generate a comparator control signal, the comparator control signal being for controlling the counter.
7. The system of claim 6 , wherein the counter is operative to count down when the comparator control signal is a logical low value.
8. The system of claim 1 , wherein the charge-current control circuit is operative to limit the charge current to the maximum charge current that the battery can handle.
9. The system of claim 1 , wherein the switching mechanism is operative to select the analog control signal when the digital count value of the counter is at a predetermined digital value.
10. A system comprising:
a digital charge reduction loop comprising:
means for determining a charge-current adjustment signal based on a source voltage of an input source;
means for generating a digital count value based on the charge-current adjustment signal; and
means for generating an analog control signal based on the digital count value, the control signal being representative of an amount of charge current to be used to charge a battery;
a means for receiving a charge-current control signal to control an amount of charge current being drawn from the input source;
a means for generating an analog control signal representative of a maximum amount of charge current to be used to charge the battery; and
a means for selecting one of the analog control signal, the selected control signal being used as the charge-current control signal to the means for receiving the charge-current control signal.
11. The system of claim 10 , wherein the means for determining the charge-current adjustment signal comprises:
a first means for comparing a first voltage based on the source voltage against a reference voltage to generate a first comparator output signal, the first comparator output signal being for controlling the means for generating the digital count value; and
a second means for comparing a second voltage based on the source voltage against the reference voltage to generate a second comparator output signal, the second comparator output signal being for controlling a switching mechanism.
12. The system of claim 11 , wherein the means for generating the digital count value is operative to count up when the first means output signal is a logical high value.
13. The system of claim 11 , wherein the means for generating the digital count value is operative to count down when the first means output signal is a logical low value.
14. The system of claim 10 , wherein the digital charge reduction loop further comprises a means for generating a clock signal, and wherein the means for generating a digital count value is operative to modify the digital count value in coordination with the means for generating the clock signal.
15. The system of claim 10 , wherein the means for determining the charge-current adjustment signal includes a means for comparing a first voltage based on the source voltage against a reference voltage to generate a comparator control signal, the comparator control signal being for controlling the means for generating the digital count value.
16. The system of claim 15 , wherein the means for generating the digital count value is operative to count down when the comparator control signal is a logical low value.
17. The system of claim 10 , wherein the means for receiving the charge-current control signal is operative to limit the charge current to the maximum charge current that the battery can handle.
18. The system of claim 10 , wherein the means for selecting is operative to select the analog control signal when the digital count value of the means for generating the digital count value is at a predetermined digital value.
19. A method comprising:
determining a charge-current adjustment signal based on a source voltage of an input source;
generating a digital count value based on the charge-current adjustment signal;
generating a DAC control signal based on the digital count value of the counter, the DAC control signal being representative of an amount of charge current to be used to charge a battery;
receiving a charge-current control signal to control an amount of charge current being drawn from the input source;
generating an analog control signal representative of a maximum amount of charge current to be used to charge the battery; and
selecting one of the analog control signal or the DAC control signal, the selected control signal being used as the charge-current control signal to the charge-current control circuit.