Systems and methods providing multi-path low noise amplifiers with seamless switching
View Patent ↗Systems and methods which provide a multimode tuner architecture implementing direct frequency conversion are shown. Embodiments provide a highly integrated configuration wherein low noise amplifier, tuner, analog and digital channel filter, and analog demodulator functionality are provided in a single integrated circuit. A LNA of embodiments implements a multi-path configuration with seamless switching to provide desired gain control while meeting noise and linearity design parameters. Embodiments of the invention implement in-phase and quadrature (IQ) equalization and a multimode channelization filter architecture to facilitate the use of direct frequency conversion. Embodiments implement spur avoidance techniques for improving tuner system operation and output using a clock signal generation architecture in which a system clock, sampling clock frequencies, local oscillator (LO) reference clock frequencies, and/or the like are dynamically movable.
1. A low noise amplifier comprising:
a high linearity path having a first adjustable gain amplifier configured for highly linear operation;
a low noise path having a second adjustable gain amplifier configured for low noise performance; and
a control circuit configured to control contribution to a signal output by the low noise amplifier by adjusting one or more of the adjustable gain amplifiers of the high linearity path and the low noise path,
wherein the control circuit is configured to increase the contribution to the signal output by the low noise amplifier by the low noise path and to decrease the contribution to the signal output by the low noise amplifier by the high linearity path as a gain of the low noise amplifier is increased.
2. The low noise amplifier of claim 1 , wherein the control circuit is configured to increase a gain of the high linearity path up to a selected highest gain setting and thereafter to increase a gain of the low noise path as the gain of the low noise amplifier is increased.
3. The low noise amplifier of claim 1 , wherein the control circuit is configured to increase the contribution to the signal output by the low noise amplifier by the high linearity path and to decrease the contribution to the signal output by the low noise amplifier by the low noise path as a gain of the low noise amplifier is decreased.
4. The low noise amplifier of claim 3 , wherein the control circuit is configured to decrease a gain of the low noise path down to a selected lowest gain setting and thereafter to decrease a gain of the high linearity path as the gain of the low noise amplifier is decreased.
5. The low noise amplifier of claim 1 , wherein the control circuit comprises:
bias current control circuitry configured to inversely control an amount of bias current provided to the first adjustable gain amplifier and the second adjustable gain amplifier to thereby control the contribution to the signal output by the low noise amplifier by the high linearity path and the low noise path.
6. A method comprising:
providing a low noise amplifier having a high linearity path and a low noise path disposed in parallel;
controlling the high linearity path and the low noise path to cooperatively provide an output signal of the low noise amplifier;
increasing a contribution to the output signal by the high linearity path as a gain of the low noise amplifier is decreased; and
decreasing a contribution to the output signal the low noise path as the gain of the low noise amplifier is decreased.
7. The method of claim 6 , wherein the controlling comprises:
increasing a contribution to the output signal by the low noise path as a gain of the low noise amplifier is increased; and
decreasing the contribution to the output signal by the high linearity path as the gain of the low noise amplifier is increased.
8. The method of claim 7 , wherein the controlling comprises:
increasing a gain of the high linearity path up to a selected highest gain setting as a gain of the low noise amplifier is increased and thereafter increasing a gain of the low noise path as the gain of the low noise amplifier is increased.
9. The method of claim 6 , wherein the controlling comprises:
decreasing a gain of the low noise path down to a selected lowest gain setting as a gain of the low noise amplifier is decreased and thereafter to decrease a gain of the high linearity path as the gain of the low noise amplifier is decreased.
10. The method of claim 6 , wherein the controlling comprises:
inversely controlling an amount of bias current provided to an adjustable gain amplifier of the high linearity path and an adjustable gain amplifier of the low noise path to thereby control a contribution to the output signal by the high linearity path and the low noise path.
11. A system comprising:
a high linearity path having a first adjustable gain amplifier configured for highly linear operation;
a low noise path having a second adjustable gain amplifier configured for low noise performance; and
a control circuit configured to control contribution to a signal output by the system from operation of the high linearity path and the low noise path through inversely controlling an amount of bias current provided to the first adjustable gain amplifier and the second adjustable gain amplifier,
wherein the high linearity path and the low noise path form at least a portion of a low noise amplifier circuit; and
wherein the control circuit is configured to increase the contribution to the signal output by the low noise amplifier by the high linearity path and to decrease the contribution to the signal output by the low noise amplifier by the low noise path as a gain of the low noise amplifier is decreased.
12. The system of claim 11 , wherein the control circuit is configured to increase the contribution to the signal output by the low noise amplifier by the low noise path and to decrease the contribution to the signal output by the low noise amplifier by the high linearity path as a gain of the low noise amplifier is increased.
13. The system of claim 12 , wherein the control circuit is configured to increase a gain of the high linearity path up to a selected highest gain setting and thereafter to increase a gain of the low noise path as the gain of the low noise amplifier is increased.
14. The system of claim 11 , wherein the control circuit is configured to decrease a gain of the low noise path down to a selected lowest gain setting and thereafter to decrease a gain of the high linearity path as the gain of the low noise amplifier is decreased.
15. The low noise amplifier of claim 1 , wherein the control circuit is further configured to decrease a gain of the linearity path and a gain of the low noise path as a gain of the low noise amplifier is decreased.
16. The system of claim 11 , wherein the control circuit is further configured to decrease a gain of the linearity path and a gain of the low noise path as a gain of the low noise amplifier is decreased.