IP Library Granted Patent US 8,299,472
Granted Patent B2
US 8,299,472 · App. 12/633,305 · Granted Oct 30, 2012

Active pixel sensor with nanowire structured photodetectors

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Quick Facts
Patent No.
US 8,299,472
App. No.
12/633,305
Granted
Oct 30, 2012
Kind
B2
Abstract

An imaging device formed as an active pixel array combining a CMOS fabrication process and a nanowire fabrication process. The pixels in the array may include a single or multiple photogates surrounding the nanowire. The photogates control the potential profile in the nanowire, allowing accumulation of photo-generated charges in the nanowire and transfer of the charges for signal readout. Each pixel may also include a readout circuit which may include a reset transistor, a charge transfer switch transistor, source follower amplifier, and pixel select transistor. A nanowire is generally structured as a vertical rod on the bulk semiconductor substrate to receive the light energy impinging onto the tip of the nanowire. The nanowire may be configured to function as either a photodetector or a waveguide configured to guild the light beam to the bulk substrate. In the embodiments herein, with the presence of the nanowire photogate and a substrate photogate, light of different wavelengths can be detected.

Claims (30)

1. A device comprising:

a substrate;

a nanowire photodetector located on the substrate, the nanowire photodetector comprising a nanowire having a surface and a core, wherein the axial direction of the nanowire is at an angle to the substrate;

an active pixel readout circuit in the substrate; and

at least one vertical photogate surrounding the nanowire.

2. The device of claim 1 , wherein the nanowire photodetector comprises a photo conductor, or a photodiode.

3. The device of claim 1 , wherein a bias voltage on the vertical photogate is configured to electrically passivate the surface of the nanowire, suppressing dark current.

4. The device of claim 3 , wherein photo carrier lifetime is increase relative to a non-passivated nanowire photodiode.

5. The device of claim 3 , wherein the device has greater quantum efficiency relative to a non-passivated nanowire photodiode.

6. The device of claim 1 , wherein the nanowire comprises an n-type semiconductor.

7. The device of claim 6 , wherein a negative bias applied to the nanowire causes depletion of charge carriers in the nanowire.

8. The device of claim 1 , wherein the nanowire comprises a p-type semiconductor.

9. The device of claim 8 , wherein a positive bias applied to the nanowire causes depletion of charge carriers in the nanowire.

10. The device of claim 1 , wherein the active pixel readout circuit comprises three transistors in a 3-T configuration.

11. The device of claim 1 , wherein the active pixel readout circuit comprises four transistors in a 4-T configuration.

12. The device of claim 1 , further comprising a microlens coupler operatively attached to the nanowire.

13. The device of claim 12 , wherein the microlens coupler is a spherical ball lens or a binary microlens.

14. The device of claim 7 , wherein an increase of the negative bias above a threshold inverts the surface of the nanowire.

15. The device of claim 9 , wherein increase of the negative bias above a threshold depletes the surface and the core of the nanowire of mobile charges.

16. The device of claim 1 , further comprising a dielectric cladding layer around the nanowire.

17. The device of claim 16 , wherein the thickness of the dielectric cladding layer varies along the nanowire in the axial direction.

18. The device of claim 1 , further comprises a substrate photodiode.

19. The device of claim 18 , wherein the nanowire is located on a first side of the substrate and the substrate photodiode is located on a second side of the substrate.

20. The device of claim 18 , wherein both the nanowire and the substrate photodiode are located on the same side of the substrate.

21. The device of claim 1 , wherein the axial direction of the nanowire is substantially perpendicular to the substrate.

22. A device comprising:

an array of pixels, the pixels comprising a substrate, a nanowire photodetector located on the substrate, the nanowire photodetector comprising a nanowire having a surface and a core, wherein the axial direction of the nanowire is at an angle to the substrate, an active pixel readout circuit in the substrate, and at least one vertical photogate surrounding the nanowire.

23. The device of claim 22 , wherein the device comprises a monolithic CMOS circuit.

24. The device of claim 22 , wherein the axial direction of the nanowire is substantially perpendicular to the substrate.

25. The device of claim 22 , wherein the presence of two photodetectors allows the collection of electromagnetic radiations of different wavelengths.

Assignments (4)
SECURITY INTEREST Recorded Mar 28, 2017
From: ZENA TECHNOLOGIES, INC.
To: PILLSBURY WINTHROP SHAW PITTMAN LLP
Reel/Frame 042105/0388 →
SECURITY INTEREST Recorded Mar 10, 2017
From: ZENA TECHNOLOGIES, INC.
To: HABBAL, FAWWAZ
Reel/Frame 041941/0895 →
SECURITY INTEREST Recorded Mar 7, 2017
From: ZENA TECHNOLOGIES, INC.
To: WU, XIANHONG
Reel/Frame 041901/0038 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2010
From: YU, YOUNG-JUNE; WOBER, MUNIB
To: ZENA TECHNOLOGIES, INC.
Reel/Frame 024028/0731 →