Low output impedance RF amplifier

1. An apparatus comprising:

a radio frequency (RF) power amplifier stage including,

a first transistor having a first terminal coupled to an amplifier RF input node, a second terminal coupled to an amplifier RF output node, wherein the second terminal is a source terminal of the first transistor, and a third terminal coupled to a supply voltage node;

a first inductor coupled between the RF output node and a bias voltage node;

wherein current through the first transistor is determined predominantly by a difference in voltage between the RF input node and the RF output node; and

wherein the first inductor is resonant with the reactance present on the RF output node.

2. The apparatus as recited in claim 1 wherein the voltages on the RF input node and the RF output node are substantially in phase with one another.

3. The apparatus as recited in claim 1 wherein the first transistor is a CMOS transistor.

4. The apparatus as recited in claim 1 wherein the supply voltage node is coupled to a system power supply.

5. The apparatus as recited in claim 1 wherein the first inductor forms the primary coil of a transformer.

6. The apparatus as recited in claim 1 wherein the bias voltage node is coupled to a system power supply.

7. The apparatus as recited in claim 1 further comprising a load network coupled to the RF output node, and wherein the load network is predominantly capacitive.

8. The apparatus as recited in claim 1 further comprising a load network coupled to the RF output node and wherein the load network comprises the input capacitance of a MOS transistor.

9. The apparatus as recited in claim 1 wherein the RF input node connects to the gate of the first transistor and the RF output node connects to the source of the first transistor and the current through the first transistor is predominantly determined by its gate-to-source voltage.

10. The apparatus as recited in claim 1 wherein the resonance between the first inductor and a load connected to the RF output node increases an impedance seen by the first transistor at RF.

11. The apparatus as recited in claim 1 further comprising a load network coupled to the RF output node and wherein the load network comprises input capacitance of an output RF power amplifier stage.

12. The apparatus as recited in claim 1 further comprising a load network coupled to the RF output node and wherein the load network comprises input capacitance of a common-source amplifier.

13. The apparatus as recited in claim 1 further comprising a bias block coupled to the bias voltage node to maintain voltage on the bias voltage node at a desired level.

14. The apparatus as recited in claim 1 further comprising a bias block connected to said supply voltage node to maintain the voltage on the supply voltage node at a desired level.

15. The apparatus as recited in claim 13 wherein the bias block maintains the bias voltage at a constant DC level.

16. The apparatus as recited in claim 13 wherein the voltage on the bias voltage node contains a baseband signal component.

17. The apparatus as recited in claim 13 wherein the voltage on the bias voltage node is controlled by feedback.

18. An apparatus comprising:

a differential radio frequency (RF) power amplifier stage including,

a positive transistor having a first terminal coupled to an amplifier positive RF input node, a second terminal coupled to an amplifier positive RF output node, wherein the second terminal of the positive transistor is a source terminal of the positive transistor, and a third terminal coupled to a positive supply voltage node;

a negative transistor having a first terminal coupled to an amplifier negative RF input node, a second terminal coupled to an amplifier negative RF output node wherein the second terminal of the negative transistor is a source terminal of the negative transistor, and a third terminal coupled to a negative supply voltage node;

a positive inductor coupled between the positive RF output node and a positive bias voltage node;

a negative inductor coupled between the negative RF output node and a negative bias voltage node;

wherein current through the positive transistor is determined predominantly by a difference in voltage between the positive RF input node and the positive RF output node;

wherein current through the negative transistor is determined predominantly by a difference in voltage between the negative RF input node and the negative RF output node;

wherein the positive inductor is resonant with a reactance present on the positive RF output node, and

wherein the negative inductor is resonant with a reactance present on the negative RF output node.

19. The apparatus as recited in claim 18 wherein the voltages on the positive RF input node and the positive RF output node are substantially in phase with one another and wherein the voltages on the negative RF input node and the negative RF output node are substantially in phase with one another.

20. The apparatus as recited in claim 18 wherein the positive and negative transistors are CMOS transistors.

21. The apparatus as recited in claim 18 wherein the positive and negative supply voltage nodes are the same node.

22. The apparatus as recited in claim 18 wherein the positive and negative inductors form the primary coil of a transformer.

23. The apparatus as recited in claim 18 wherein the positive and negative bias voltage nodes are the same node.

24. The apparatus as recited in claim 18 wherein positive and negative load networks coupled to the positive and negative RF output nodes are predominantly capacitive.

25. The apparatus as recited in claim 18 further comprising:

a positive load network coupled to the positive RF output node;

a negative load network coupled to the negative RF output node; and

wherein the positive and negative load networks comprise input capacitances of positive and negative MOS transistors.

26. The apparatus as recited in claim 18 further comprising:

a positive load network coupled to the positive RF output node;

a negative load network coupled to the negative RF output node; and

wherein the positive and negative load networks comprise input capacitances of positive and negative inputs to an output RF power amplifier stage.

27. The apparatus as recited in claim 18 further comprising a bias block coupled to the bias voltage node to maintain a bias voltage on the bias voltage node at a desired level.

28. The apparatus as recited in claim 18 further comprising a bias block connected to said supply voltage node to maintain a bias voltage on the supply voltage node at a desired level.

29. The apparatus as recited in claim 27 wherein the bias block maintains the bias voltage at a constant DC level.

30. The apparatus as recited in claim 27 wherein the voltage on the bias voltage node contains a baseband signal component.

31. The apparatus as recited in claim 27 wherein the voltage on the bias voltage node is controlled by feedback.

32. A method for operating a low impedance amplifier comprising:

receiving an RF signal at a control terminal of a transistor;

receiving a supply voltage at a first current carrying terminal of the transistor;

supplying an RF output signal from a second current carrying terminal of the transistor to an RF output node, the second current carrying terminal being a source terminal of the transistor;

achieving a higher load impedance seen by the transistor at RF frequencies by resonating an inductor coupled to the RF output node with reactance present on the RF output node; and

determining current through the transistor according to a difference in voltage between the control terminal and the RF output node.