IP Library Granted Patent US 9,397,720
Granted Patent B2
US 9,397,720 · App. 12/635,382 · Granted Jul 19, 2016

Method and system for integrating transmit switch functionality in a WLAN radio transceiver

Inventors: Albert Chia-Wen Jerng (Los Gatos, CA); Jen-Wei Ko (Cupertino, CA); Weijun Yao (Mountain View, CA); Eric Chiyuan Lu (San Jose, CA)
Assignee: MEDIATEK INC.
H04B1/44H04B1/00
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Quick Facts
Patent No.
US 9,397,720
App. No.
12/635,382
Granted
Jul 19, 2016
Kind
B2
Abstract

A radio transceiver is disclosed. The transceiver comprises an integrated circuit. The integrated circuit comprises a transmit path; a first switch coupled in series with the output of the transmit path; a receive path; and a second switch coupled as a shunt with the input of the receive path. The transceiver further comprises a plurality of external matching networks coupled to the transmit and receive paths of the integrated circuit to ensure minimal loading from one path to the other. The transceiver also comprises a shared balun for converting differential signals from the plurality of external matching networks to single ended signals; and an antenna to interface with the single ended signals. A method and system in accordance with an embodiment enables tying together the transmit path and the receive paths of a radio transceiver without the need for an external T/R switch. A method and system in accordance with an embodiment minimizes the loading effects between the transmit path and the receive path such that output power and NF noise figure are not degraded after tying the transmit path and the receive path together.

Claims (16)

1. A transceiver comprising:

an integrated circuit that includes a transmit path, a first switch coupled in series with an output of the transmit path, a receive path, and a second switch coupled as a shunt with an input of the receive path; and

a plurality of external matching networks coupled to the transmit and receive paths of the integrated circuit to reduce loading from one path to other, wherein the first switch is located between the plurality of external matching networks and a power amplifier of the transmit path and the second switch is located between the plurality of external matching networks and a low noise amplifier of the receive path, wherein the plurality of external matching networks are external to the integrated circuit of the transceiver and are all directly coupled to a shared balun via a single port to convert differential signals from the plurality of external matching networks into single-ended signals that interface with an antenna coupled to the shared balun, wherein the plurality of external matching networks further comprises a first network as a series inductance network for providing a large inductance when the integrated circuit is in a transmit mode and providing an impedance match to the LNA input when the integrated circuit is in a receive mode; a second network as a series capacitance network for providing minimal loading when in the receive mode; and a third network as a shunt inductance network for providing impedance matching for the receive and the transmit paths.

2. The transceiver of claim 1 , wherein the integrated circuit is a radio transceiver integrated circuit.

3. The transceiver of claim 1 , wherein the receive path comprises a low noise amplifier (LNA) and an RF Down Converter coupled to the LNA, and the transmit path comprises a power amplifier (PA) and an RF Up Converter coupled to the PA.

4. The transceiver of claim 1 , wherein the first and second switches are closed when the transceiver is in a transmit mode, and the first and second switches are open when the transceiver is in a receive mode.

5. The transceiver of claim 3 , further comprising:

a digital signal processor for receiving data from the RF Down Converter and for transmitting data to the RF Up Converter.

6. A method comprising:

providing an integrated circuit that includes a transmit path, a first switch coupled in series with an output of the transmit path, a receive path, and a second switch coupled as a shunt with an input of the receive path; and

providing a plurality of external matching networks coupled to the transmit and receive paths of the integrated circuit to reduce loading from one path to other, wherein the first switch is located between the plurality of external matching networks and a power amplifier of the transmit path and the second switch is located between the plurality of external matching networks and a low noise amplifier of the receive path, wherein the plurality of external matching networks are external to the integrated circuit of the transceiver and are all directly coupled to a shared balun via a single port to convert differential signals from the plurality of external matching networks into single-ended signals that interface with an antenna coupled to the shared balun, wherein the plurality of external matching networks further comprises a first network as a series inductance network for providing a large inductance when the integrated circuit is in a transmit mode and providing an impedance match to the LNA input when the integrated circuit is in a receive mode; a second network as a series capacitance network for providing minimal loading when in the receive mode; and a third network as a shunt inductance network for providing impedance matching for the receive and the transmit paths.

7. The method of claim 6 , wherein the receive path comprises a low noise amplifier (LNA) and an RF Down Converter coupled to the LNA, and the transmit path comprises a power amplifier (PA) and an RF Up Converter coupled to the PA.

8. The method of claim 6 , further comprising:

closing the first and second switches when the transceiver is in a transmit mode, and opening the first and second switches when the transceiver is in a receive mode.

9. The method of claim 7 , further comprising:

receiving data from the RF Down Converter and transmitting data to the RF Up Converter by a digital signal processor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2011
From: RALINK TECHNOLOGY (SINGAPORE) CORPORATION
To: MEDIATEK INC.
Reel/Frame 026992/0524 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2009
From: JERNG, ALBERT CHIA-WEN; KO, JEN-WEI; YAO, WEIJUN; LU, ERIC CHIYUAN
To: RALINK TECHNOLOGY (SINGAPORE) CORPORATION
Reel/Frame 023637/0864 →
Continuity (1)
Related Publication 20110143690A1 · Jun 16, 2011