IP Library Granted Patent US 8,436,397
Granted Patent B2
US 8,436,397 · App. 12/639,054 · Granted May 7, 2013

Semiconductor device including normally-off type junction transistor and method of manufacturing the same

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Quick Facts
Patent No.
US 8,436,397
App. No.
12/639,054
Granted
May 7, 2013
Kind
B2
Abstract

In a junction FET of a normally-off type, a technique capable of achieving both of improvement of a blocking voltage and reduction of an ON resistance is provided. In a junction FET using silicon carbide as a substrate material, impurities are doped to a vicinity of a p-n junction between a gate region and a channel-formed region, the impurities having a conductive type which is reverse to that of impurities doped in the gate region and same as that of impurities doped in the channel-formed region. In this manner, an impurity profile of the p-n junction becomes abrupt, and further, an impurity concentration of a junction region forming the p-n junction with the gate region in the channel-formed region is higher than those of a center region in the channel-formed region and of an epitaxial layer.

Claims (49)

1. A semiconductor device comprising:

(a) a semiconductor substrate of a first conductive type to be a drain layer;

(b) an epitaxial layer of a first conductive type formed on the semiconductor substrate;

(c) a plurality of trenches each formed so as to reach an inside of the epitaxial layer from a surface of the epitaxial layer;

(d) a source layer of a first conductive type formed on a surface region of the epitaxial layer interposed between trenches adjacent to each other;

(e) a gate layer of a second conductive type formed in the epitaxial layer so as to contact with side walls and a bottom portion of each of the plurality of trenches;

(f) a channel-formed region of a first conductive type formed in the epitaxial layer between portions of the gate layer adjacent to each other;

(g) a drain electrode formed on a rear surface of the semiconductor substrate;

(h) a source electrode formed so as to connect to the source layer; and

(i) a gate electrode formed so as to connect to the gate layer, wherein

in a horizontal direction, an impurity concentration of a first conductive type impurity doped in a junction region forming a p-n junction with the gate layer in the channel-formed region formed between the portions of the gate layer adjacent to each other is higher than an impurity concentration of a first conductive type impurity doped in a center region in the channel-formed region.

2. The semiconductor device according to claim 1 , wherein

a peak of the impurity concentration of the junction region forming the p-n junction with the gate layer in the channel-formed region is twice or more and five times or less as high as that of the epitaxial layer.

3. The semiconductor device according to claim 2 , wherein

the impurity concentration of the epitaxial layer is lower than that of the semiconductor substrate.

4. The semiconductor device according to claim 1 , wherein

a substrate material of the semiconductor substrate is silicon carbide.

5. The semiconductor device according to claim 4 , wherein

the first conductive type is an n type, and the second conductive type is a p type.

6. The semiconductor device according to claim 5 , wherein

impurities doped in the gate layer are aluminum or boron, and

impurities doped in the channel-formed region are nitrogen or phosphorus.

7. The semiconductor device according to claim 1 , wherein

a substrate material of the semiconductor substrate is gallium nitride.

8. A semiconductor device comprising:

(a) a semiconductor substrate of a first conductive type to be a drain layer;

(b) an epitaxial layer of a first conductive type formed on the semiconductor substrate;

(c) a plurality of trenches each formed so as to reach an inside of the epitaxial layer from a surface of the epitaxial layer;

(d) a source layer of a first conductive type formed on a surface region of the epitaxial layer interposed between trenches adjacent to each other;

(e) a gate layer of a second conductive type formed in the epitaxial layer so as to contact with a bottom portion of each of the plurality of trenches;

(f) a channel-formed region of a first conductive type formed in the epitaxial layer between portions of the gate layer adjacent to each other;

(g) a drain electrode formed on a rear surface of the semiconductor substrate;

(h) a source electrode formed so as to connect to the source layer; and

(i) a gate electrode formed so as to connect to the gate layer, wherein

in a horizontal direction, an impurity concentration of a first conductive type impurity doped in a junction region forming a p-n junction with the gate layer in the channel-formed region formed between the portions of the gate layer adjacent to each other is higher than an impurity concentration of a first conductive type impurity doped in a center region in the channel-formed region.

9. The semiconductor device according to claim 8 , wherein

a peak of the impurity concentration of the junction region forming the p-n junction with the gate layer in the channel-formed region is twice or more and five times or less as high as that of the epitaxial layer.

10. A semiconductor device comprising:

(a) a semiconductor substrate of a first conductive type to be a drain layer;

(b) an epitaxial layer of a first conductive type formed on the semiconductor substrate;

(c) a source layer of a first conductive type formed so as to dispose portions of the source layer apart from each other at a constant distance on a surface region of the epitaxial layer;

(d) a gate layer of a second conductive type formed in the epitaxial layer between portions of the source layer adjacent to each other, the gate layer being deeper than the source layer;

(e) a channel-formed region of a first conductive type formed in the epitaxial layer between portions of the gate layer adjacent to each other;

(f) a drain electrode formed on a rear surface of the semiconductor substrate;

(g) a source electrode formed so as to connect to the source layer; and

(h) a gate electrode formed so as to connect to the gate layer, wherein

in a horizontal direction, an impurity concentration of a first conductive type impurity doped in a junction region forming a p-n junction with the gate layer in the channel-formed region formed between the portions of the gate layer adjacent to each other is higher than an impurity concentration of a first conductive type impurity doped in a center region in the channel-formed region.

11. The semiconductor device according to claim 10 , wherein

a peak of the impurity concentration of the junction region forming the p-n junction with the gate layer in the channel-formed region is twice or more and five times or less as high as that of the epitaxial layer.

Assignments (4)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Sep 1, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRRONICS CORPORATION
Reel/Frame 024933/0869 →
CHANGE OF NAME Recorded Sep 1, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024953/0404 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2010
From: SHIMIZU, HARUKA; YOKOYAMA, NATSUKI
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 024053/0156 →