IP Library Granted Patent US 9,195,102
Granted Patent B2
US 9,195,102 · App. 12/642,312 · Granted Nov 24, 2015

Liquid crystal panel and electronic apparatus including pixel electrode connection portion

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Quick Facts
Patent No.
US 9,195,102
App. No.
12/642,312
Granted
Nov 24, 2015
Kind
B2
Abstract

A liquid crystal panel includes: first and second substrates arranged to be opposite each other at a predetermined gap; a liquid crystal layer filled between the first and second substrates; alignment films; a counter electrode pattern formed on the first substrate; and a pixel electrode pattern formed on the first substrate so as to have a plurality of electrode branches, the pixel electrode pattern having a partial connection branch formed around a contact so as to transversely connect a plurality of electrode branches extending from the contact from among the plurality of electrode branches.

Claims (52)

1. A liquid crystal panel comprising:

first and second substrates arranged to be opposite each other at a predetermined gap;

a liquid crystal layer filled between the first and second substrates;

a counter electrode pattern formed on the first substrate;

a pixel electrode pattern formed on the first substrate;

scanning lines to which control pulses for providing write timing of a signal potential are applied; and

signal lines to which the signal potential is applied,

wherein the pixel electrode pattern includes

a contact portion connected to a first main electrode of a transistor, whose gate electrode is connected to one of the scanning lines, and whose second main electrode is connected to one of the signal lines,

a plurality of elongated electrode branches having lengths greater than widths and formed in a pixel region surrounded by the scanning lines and signal lines,

a plurality of elongated slits having lengths greater than widths and formed between the electrode branches in a lengthwise extending direction of the electrode branches,

a partial connection branch of the pixel electrode pattern that is positioned nearer to the contact portion than to a center of the pixel region and that subdivides at least one of the slits in the lengthwise extending direction of the electrode branches into a plurality of slit portions aligned in said lengthwise extending direction of the electrode branches,

a first connection portion connecting ends of each of the electrode branches at the ends adjacent to the contact portion,

a second connection portion connecting the other ends of each of the electrode branches,

wherein the electrode branches include:

first electrode branches that connect the first connection portion and the second connection portion; and

second electrode branches that connect the partial connection portion branch and the second connection portion,

the contact portion is arranged between the first electrode branches in a widthwise extending direction of the electrode branches, the slit portions of each of the slits include a first slit portion and a second slit portion that is shorter than the first slit portion and that is disposed between the contact portion and the partial connection branch, and

the partial connection branch is disposed between each of the first slit portion and the second slit portion of each of the slits.

2. The liquid crystal panel according to claim 1 ,

wherein the pixel electrode pattern and the counter electrode pattern are formed on different layer surfaces.

3. An electronic apparatus comprising:

a liquid crystal panel, the liquid crystal panel including

first and second substrates arranged to be opposite each other at a predetermined gap,

a liquid crystal layer filled between the first and second substrates,

a counter electrode pattern formed on the first substrate, and

a pixel electrode pattern formed on the first substrate,

scanning lines to which control pulses for providing write timing of a signal potential are applied, and

signal lines to which the signal potential is applied;

a driving circuit driving the liquid crystal panel;

a system control unit controlling the operation of the entire system; and

an operation input unit receiving an operation input to the system control unit,

wherein the pixel electrode pattern includes

a contact portion connected to a first main electrode of a transistor, whose gate electrode is connected to one of the scanning lines, and whose second main electrode is connected to one of the signal lines,

a plurality of elongated electrode branches having lengths greater than widths and formed in a pixel region surrounded by the scanning lines and signal lines,

a plurality of elongated slits having lengths greater than widths and formed between the electrode branches in a lengthwise extending direction of the electrode branches,

a partial connection branch of the pixel electrode pattern that is positioned nearer to the contact portion than to a center of the pixel region and that subdivides at least one of the slits in the lengthwise extending direction of the electrode branches into a plurality of slit portions aligned in said lengthwise extending direction of the electrode branches,

a first connection portion connecting ends of each of the electrode branches with a side of at the ends adjacent to the contact portion, and

a second connection portion connecting the other ends of each of the electrode branches,

wherein the electrode branches include:

first electrode branches that connect the first connection portion and the second connection portion; and

second electrode branches that connect the partial connection portion branch and the second connection portion,

the contact portion is arranged between the first electrode branches in a widthwise extending direction of the electrode branches, the slit portions of each of the slits include a first slit portion and a second slit portion that is shorter than the first slit portion and that is disposed between the contact portion and the partial connection branch, and

the partial connection branch is disposed between each of the first slit portion and the second slit portion of each of the slits.

4. The liquid crystal panel according to claim 1 , wherein a line that passes through both a center of the partial connection branch and a center of the pixel region is substantially parallel to the extending direction of the elongated electrode branches.

5. The electronic apparatus according to claim 3 , wherein a line that passes through both a center of the partial connection branch and a center of the pixel region is substantially parallel to the extending direction of the elongated electrode branches.

6. The liquid crystal panel according to claim 1 ,

wherein

the contact portion is arranged between the first connection portion and the partial connection branch in the lengthwise extending direction of the electrode branches.

7. The electronic apparatus according to claim 3 ,

wherein

the contact portion is arranged between the first connection portion and the partial connection branch in the lengthwise extending direction of the electrode branches.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
CHANGE OF NAME Recorded Aug 12, 2015
From: JAPAN DISPLAY WEST INC.
To: JAPAN DISPLAY INC.
Reel/Frame 036336/0034 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2013
From: SONY CORPORATION
To: JAPAN DISPLAY WEST INC.
Reel/Frame 030182/0522 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2010
From: SAKURAI, YOSHIHIRO; TANAKA, HIRONAO; YAMAGUCHI, HIDEMASA
To: SONY CORPORATION
Reel/Frame 023947/0051 →