IP Library Granted Patent US 8,194,676
Granted Patent B2
US 8,194,676 · App. 12/643,145 · Granted Jun 5, 2012

Streaming segmentation and reassembly in asynchronous transfer mode communications

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Quick Facts
Patent No.
US 8,194,676
App. No.
12/643,145
Granted
Jun 5, 2012
Kind
B2
Abstract

Systems, methods, and apparatuses are provided that enable streaming of ATM cells between a transmit/receive data processing application and a transmission convergence function. Data to be segmented into an ATM cell is received at a SAR engine, and provided to a transmission convergence function, with the first cells transmitted to the transmission convergence function before the SAR function receives an end-of-packet indication from the optimization engine. Data received at a transmission convergence function is placed in a received packet queue at the SAR function, with packets provided to an application after a start-of-packet indication is received, and before an end-of-packet indication is received, at the SAR function.

Claims (44)

1. A method for transmitting data over an asynchronous transfer mode network, comprising:

receiving data at a segmentation and reassembly application, the data received as part of a data stream having a start of packet indicator and an end of packet indicator;

placing information from the data stream into a plurality of ATM cells, wherein the information is placed into a first ATM cell before the end of packet indicator is received at the segmentation and reassembly application;

transmitting the plurality of the ATM cells, the first ATM cell transmitted from the segmentation and reassembly application before end of packet indicator is received at the segmentation and reassembly application; and

when the end of packet indicator is received, setting payload type indicator bits in a final ATM cell header and appending a trailer to a final ATM cell.

2. The method of claim 1 , wherein the segmentation and reassembly application receives the data stream from a transmit data processing function.

3. The method of claim 1 , wherein the segmentation and reassembly application is an ATM Adaptation Layer Type 5 segmentation and reassembly application.

4. The method of claim 1 , wherein said transmitting comprises transmitting the ATM cells to a transmission convergence function.

5. The method of claim 4 , wherein the steps of processing data by the segmentation and reassembly application are performed by an Field Programmable Gate Array (FPGA).

6. The method of claim 1 , wherein each ATM cell comprises up to 48 bytes in an ATM cell payload.

7. The method of claim 6 , wherein the final ATM cell includes an 8 octet trailer.

8. A method for receiving data from an asynchronous transfer mode network, comprising:

receiving a plurality of cells at a transmission convergence application and sending them to a segmentation and reassembly application, the cells received as part of a packet cell stream having a start-of-packet indicator and an end-of-packet indicator;

the segmentation and reassembly application placing the cells into a receive cell queue, detecting the start-of-packet indicator in one of the cells in the receive cell queue and sending an indication of start of packet to a receive data processing application;

the segmentation and reassembly application transmitting the cells to the receive data processing application, a first cell transmitted to the receive data processing application from the segmentation and reassembly application before the end-of-packet indicator is received at the segmentation and reassembly application; and

when the segmentation and reassembly application receives the end-of-packet indicator, providing an indication of end of packet to the receive data processing application and providing an 8-byte trailer to the receive data processing application for packet transmit validation.

9. A method for receiving data from an asynchronous transfer mode network, comprising:

receiving a plurality of cells at a transmission convergence application and sending them to a segmentation and reassembly application, the cells received as part of a data stream having a start-of-packet indicator and an end-of-packet indicator;

the segmentation and reassembly application placing the received cells into a receive cell queue, detecting a start-of-packet indicator in one of the cells in the queue and sending the indicator to a receive data processing application, wherein the receive data processing application comprises an optimization decoder;

the segmentation and reassembly application transmitting the cells to the receive data processing application, the first cell transmitted to the receive data processing application from the segmentation and reassembly application before the end-of-packet indicator is received at the segmentation and reassembly application; and

when the segmentation and reassembly application receives an indication that the final cell of the ATM cells is received, providing an end-of-packet indication to the receive data processing application and providing an 8-byte trailer to the receive data processing application for packet transmit validation.

10. The method of claim 8 , further comprising:

receiving cells from the received cell queue at a segmentation and reassembly application; and

assembling a plurality of the cells from the received cell queue into a packet cell stream to be provided to the receive data processing application.

11. The method of claim 10 , wherein said segmentation and reassembly application is operable to perform segmentation and reassembly based on ATM Adaptation Layer Type 5 ATM cells.

12. The method of claim 11 , wherein said transmission convergence, segmentation and reassembly, and receive data processing application steps are performed by an Field Programmable Gate Array (FPGA).

13. The method of claim 8 , wherein each cell placed into the received cell queue comprises a 48-byte payload.

14. The method of claim 13 , wherein a final cell includes a payload type indicator bit which is set to indicate that the cell is the final cell in the packet cell stream, and the final cell includes a 8 octet trailer.

15. An ATM network endpoint, comprising:

a memory device;

a processing device; and

an ATM network interface device comprising a transmit data processing module that operates to prepare a packet of data for transmission across the ATM network, an ATM segmentation and reassembly module that operates to divide the packet of data into a plurality of ATM cells to form a packet cell stream, and a transmission convergence module;

the segmentation and reassembly module providing a portion of the packet of data into a first ATM cell before receiving an end-of-packet indicator for the packet of data, and providing the first ATM cell to the transmission convergence module before receiving the end-of-packet indicator for the packet of data.

16. The ATM network interface of claim 15 , wherein the transmit data processing module is comprised of one or both of a codec application and a data compression application.

17. The ATM network interface of claim 15 , wherein the transmission convergence module operates to convert data formatted for use by the ATM network interface into data for use by the ATM network.

18. An ATM endpoint, comprising:

a memory device;

a processing device, and

an ATM network interface device comprising:

a transmission convergence module for receiving ATM cells;

a receive data processing application that operates to receive a packet of data transmitted across an ATM network; and

a segmentation and reassembly module for reassembling a packet of data from a packet cell stream that includes a start-of-packet indicator for the packet cell stream and an end-of-packet indicator for the packet cell stream, the segmentation and reassembly module providing a first ATM cell to the receive data processing application before it receives the end-of-packet indicator for the packet cell stream.

19. The ATM network interface of claim 18 , wherein the receive data processing module is comprised of one or both of a codec application and a data compression application.

20. The ATM network interface of claim 18 , wherein the transmission convergence module operates to convert ATM network formatted data into a format that can be used by the ATM network interface.

Assignments (15)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
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RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (045455/0001) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO ASAP SOFTWARE EXPRESS, INC.); DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC CORPORATION (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MAGINATICS LLC); EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); SCALEIO LLC
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RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (040136/0001) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO ASAP SOFTWARE EXPRESS, INC.); DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC CORPORATION (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MAGINATICS LLC); EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); SCALEIO LLC
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RELEASE OF SECURITY INTEREST Recorded Nov 3, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL, L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058216/0001 →
MERGER Recorded Mar 4, 2021
From: FORCE10 NETWORKS, INC.
To: DELL MARKETING CORPORATION
Reel/Frame 056104/0988 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
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SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
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