Device and method for generating clock signals for DC-DC converters
View Patent ↗An electronic device includes a DC-DC converter for voltage conversion in a slave mode an in a master mode and including a phase locked loop. The phase locked loop comprises a controlled oscillator, a filter having an integration capacitor coupled to a control input of the controlled oscillator, a charge pump, and a phase frequency detector. In the slave mode, the controlled oscillator, the filter, the charge pump and the phase frequency detector are coupled to operate as the phase locked loop. There is a comparator coupled with an input to a control input of the controlled oscillator and with an output to the charge pump. In the master mode, the comparator is configured to control the charge pump in response to a control signal at the control input of the controlled oscillator when the phase frequency detector is switched off so as to perform a modulation of the control signal at the control input of the controlled oscillator by charging and discharging the integration capacitor.
1. An integrated circuit electronic device, comprising a control circuit for DC-DC converter for voltage conversion configured so that the same integrated circuit is usable in a slave mode and in a master mode and including a phase locked loop, the phase locked loop comprising:
a controlled oscillator;
a filter having an integration capacitor coupled to a control input of the controlled oscillator;
a charge pump;
a phase frequency detector;
the controlled oscillator, the filter, the charge pump and the phase frequency detector being configured to operate in the slave mode as the phase locked loop wherein the phase locked loop synchronizes a clock in the slave DC-DC converter to a reference clock signal generated by an identical integrated circuit used in a master mode;
a first comparator, which is coupled with an input to a control input of the controlled oscillator and with an output to the charge pump; and
wherein, in the master mode, the first comparator is configured to control the charge pump in response to a control signal at the control input of the controlled oscillator so as to perform a modulation of the control signal at the control input of the controlled oscillator by charging and discharging the integration capacitor to generate the reference clock signal usable by an identical integrated circuit operating in a slave mode and wherein in master mode, the phase frequency detector is turned off and the reference clock generator is continuously varied in frequency.
2. The electronic device according to claim 1 , wherein the controlled oscillator comprises an oscillator capacitor and an oscillator resistor and a second comparator configured to control charging and discharging of the oscillator capacitor in response to a controlled oscillator output signal, so as to give the output signal a saw tooth waveform.
3. The electronic device according to claim 2 , comprising a controlled current source configured to supply a current to the oscillator capacitor which is proportional to a level of the control signal.
4. A system comprising at least two electronic devices according to claim 1 , wherein a first one of the two electronic devices is configured as a master device and a second one of the electronic device is configured as a slave device and the second electronic device is coupled to receive a modulated output signal of the first electronic device as a reference input signal for the PLL.