IP Library Granted Patent US 8,176,488
Granted Patent B1
US 8,176,488 · App. 12/647,414 · Granted May 8, 2012

Methods and systems for determining potentially unsafe instructions in a virtual machine context and activating a software debugger to process the potentially unsafe instructions

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Quick Facts
Patent No.
US 8,176,488
App. No.
12/647,414
Granted
May 8, 2012
Kind
B1
Abstract

Methods and systems for safe execution of guest code in virtual machine context are presented. A method for running a virtual machine in a computing system includes (a) launching a virtual machine monitor (VMM) that uses a software debugger; (b) launching a virtual machine (VM) that can natively run safe instructions; (c) determining, at runtime, if the instruction is safe or potentially unsafe; (d) executing safe instructions in a native mode; and (e) activating control logic to process potentially unsafe instructions in the software debugger. The software debugger can bypass at least one of the potentially unsafe instructions. The potentially unsafe instructions include instructions that cannot be safely executed in the context of the VM, and instructions that can cause unpredictable results in the context of the VM.

Claims (82)

1. A method for running a virtual machine in a computing system, comprising:

(a) launching a virtual machine monitor (VMM) that uses a software debugger;

(b) launching a virtual machine (VM) running guest code that can natively run safe instructions;

(c) using the software debugger to replace at least some privileged instructions in the guest code with interrupts,

(d) determining, at runtime, if the instruction is safe or potentially unsafe, wherein the potentially unsafe instructions are non-privileged instructions that can execute incorrectly in a context of the VM;

(e) executing the safe instructions in a native mode of the VM; and

(f) activating control logic to process potentially unsafe instructions in the software debugger,

wherein offset addresses in the guest code are the same as offset addresses in source code from which the guest code was generated.

2. The method of claim 1 , further comprising:

(g) bypassing at least one potentially unsafe instruction.

3. The method of claim 2 , wherein step (g) further comprises:

generating bypassing code for the at least one potentially unsafe instruction; and

executing the bypassing code.

4. The method of claim 2 , wherein step (g) further comprises:

transferring control to the VM after processing the at least one potentially unsafe instruction in the VMM; and

restarting the at least one potentially unsafe instruction when that potentially unsafe instruction is safe in a current context of the VM.

5. The method of claim 2 , wherein step (g) further comprises:

using the VMM, adjusting a current context of the VM to ensure safe execution of the at least one potentially unsafe instruction in the VM;

transferring control from the VMM to the VM; and

executing the at least one potentially unsafe instruction in the adjusted context of the VM.

6. The method of claim 1 , wherein step (d) comprises analyzing the instruction prior to its execution.

7. The method of claim 1 , wherein step (d) comprises adjusting a context of the VM to enter an exception state during attempts to execute the potentially unsafe instructions.

8. The method of claim 1 , wherein step (d) comprises analyzing, at runtime and while running the control logic, a context of the VM to predict if a set of instructions to be executed in the future contains a potentially unsafe instruction.

9. The method of claim 1 , wherein step (d) comprises:

analyzing, at runtime and while running the control logic, a context of the VM and a set of previously executed instructions; and

correcting a state of the VM if the state of the VM was damaged by a potentially unsafe instruction from a set of previously executed instructions.

10. The method of claim 1 , wherein step (f) further comprises:

analyzing a source page of guest code to identify the potentially unsafe instructions;

generating a target page of the guest code with breakpoints replacing the potentially unsafe instructions; and

executing instructions of the target page in a context of the VM.

11. The method of claim 10 , wherein step (f) further comprises:

analyzing a plurality of pages of guest code to identify the potentially unsafe instructions;

grouping the analyzed pages in a plurality of analyzed frames;

mapping several analyzed frames simultaneously into guest address space;

executing transfers of control between the mapped frames in the context of the VM; and

activating the software debugger to handle transfers of control out of a mapped frame.

12. The method of claim 10 , wherein step (e) further comprises:

mapping the target page to a frame; and

establishing page protection on the corresponding source page to intercept attempts of the guest code to modify the corresponding source page.

13. The method of claim 12 , further comprising, upon detecting an attempt by the guest code to modify corresponding source page by means of a page fault:

unmapping the target page from the frame;

marking the target page as “changed” in a target page cache; and

removing protection from corresponding source page; and

when mapping into the frame a target page from target pages cache, if a page is marked as “changed” and if analyzed address area was affected by those changes:

removing the target page from the target page cache;

initializing a new target page; and

starting analyzing routine.

14. The method of claim 13 , further comprising, upon detecting an attempts by the guest code to modify a corresponding source page by means of page fault:

unmapping the target page from the frame;

removing the target page from the target page cache; and

removing protection from corresponding source page.

15. The method of claim 1 , wherein step (f) further comprises:

generating a target page filled with breakpoints;

replacing the breakpoints in the target page with the safe instructions of a source page of guest code, with address offsets preserved; and

executing instructions of the target page in a context of the VM.

16. The method of claim 1 , wherein step (f) further comprises:

generating a target page by replacing a potentially unsafe instruction of a source page of guest code with an instruction that calls a stub;

executing instructions of the target page in the context of the VM;

after calling the stub, determining whether the potentially unsafe instructions can be safely executed in the context of the VM; and

activating the software debugger to handle the potentially unsafe instructions incapable of being safely executed in the context of the VM.

17. A computer program product for running a virtual machine in a computing system, the computer program product comprising a non-transitory computer useable medium having computer program logic recorded thereon for controlling at least one processor for performing the steps of:

(a) launching a virtual machine monitor (VMM) that uses a software debugger;

(b) launching a virtual machine (VM) running guest code that can natively run safe instructions;

(c) using the software debugger to replace at least some privileged instructions in the guest code with interrupts,

(d) determining, at runtime, if the instruction is safe or potentially unsafe, wherein the potentially unsafe instructions are non-privileged instructions that can execute incorrectly in a context of the VM;

(e) executing the safe instructions in a native mode of the VM; and

(f) activating control logic to process potentially unsafe instructions in the software debugger,

wherein offset addresses in the guest code are the same as offset addresses in source code from which the guest code was generated.

18. A computing system for running a virtual machine, comprising:

a processor and a memory coupled to the processor;

computer code loaded into the memory for implementing the following:

a virtual machine monitor (VMM) that uses a software debugger;

a virtual machine (VM) running guest code that executes safe instructions in a native mode, wherein the software debugger replaces at least some privileged instructions in the guest code with interrupts, and wherein offset addresses in the guest code are the same as offset addresses in source code from which the guest code was generated; and

control logic that determines, at runtime, if the instruction is safe or potentially unsafe, wherein the potentially unsafe instructions are non-privileged instructions that can execute incorrectly in a context of the VM, and activates the software debugger in a VMM context to handle the potentially unsafe instructions,

wherein the software debugger bypasses at least one of the potentially unsafe instructions.

19. The system of claim 18 , wherein the potentially unsafe instructions include instructions that cannot be safely executed in the context of the VM, and instructions that can cause unpredictable results in the context of the VM.

20. The system of claim 18 , wherein the software debugger restarts execution of the at least one potentially unsafe instruction when that potentially unsafe instruction is safe in the context of the VM.

21. The system of claim 18 , wherein the software debugger adjusts a current context of the VM to ensure safe execution of the at least one potentially unsafe instruction in the context of the VM.

22. The system of claim 18 , wherein the control logic analyzes a source page of guest code to identify the potentially unsafe instructions, and generates a target page of the guest code, with breakpoints replacing the potentially unsafe instructions in the target page, and wherein the VM executes instructions of the target page.

23. The system of claim 18 , wherein opcodes that are invalid in the context of the VM activate the software debugger processing logic.

24. The system of claim 18 , wherein the control logic includes at least one of a hardware control logic and a software control logic.

25. The system of claim 18 , further comprising an exception handler that bypasses the potentially unsafe instructions.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Jul 18, 2019
From: UBS AG, STAMFORD BRANCH, AS ADMINISTRATIVE AND COLLATERAL AGENT
To: COREL CORPORATION; CLEARSLIDE, INC.; PARALLELS INTERNATIONAL GMBH
Reel/Frame 049787/0073 →
RELEASE OF SECURITY INTEREST RECORDED AT : REEL 047973 FRAME 0797 Recorded Jul 17, 2019
From: UBS AG, STAMFORD BRANCH
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 049773/0590 →
SECURITY INTEREST Recorded Dec 21, 2018
From: PARALLELS INTERNATIONAL GMBH
To: UBS AG, STAMFORD BRANCH
Reel/Frame 047973/0797 →
MERGER Recorded Jan 30, 2018
From: PARALLELS IP HOLDINGS GMBH
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 045193/0679 →
RELEASE OF SECURITY INTEREST Recorded Dec 14, 2015
From: SILICON VALLEY BANK
To: PARALLELS HOLDINGS LTD. (F/K/A SWSOFT HOLDINGS LTD.)
Reel/Frame 037289/0685 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2011
From: PARALLELS SOFTWARE INTERNATIONAL, INC.
To: PARALLELS HOLDINGS, LTD.
Reel/Frame 027467/0328 →
SECURITY AGREEMENT Recorded Jun 23, 2011
From: PARALLELS HOLDINGS LTD. (F/K/A SWSOFT HOLDINGS LTD.)
To: SILICON VALLEY BANK
Reel/Frame 026480/0957 →
SECURITY AGREEMENT Recorded Apr 3, 2010
From: PARALLELS HOLDINGS, LTD.
To: SILICON VALLEY BANK
Reel/Frame 024182/0685 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 25, 2009
From: BELOUSSOV, SERGUEI M.; TORMASOV, ALEXANDER G.; DOBROVOLSKIY, NIKOLAY N.; OMELYANCHUK, ANDREY A.; PROTASSOV, STANISLAV S.
To: PARALLELS SOFTWARE INTERNATIONAL, INC.
Reel/Frame 023704/0361 →