Lock-free concurrent object dictionary
View Patent ↗An object storage system comprises one or more computer processors or threads that can concurrently access a shared memory, the shared memory comprising an array of equally-sized cells. In one embodiment, each cell is of the size used by the processors to represent a pointer, e.g., 64 bits. Using an algorithm performing only one memory write, and using a hardware-provided transactional operation, such as a compare-and-swap instruction, to implement the memory write, concurrent access is safely accommodated in a lock-free manner.
1. A memory-based object dictionary comprising:
a linearly-addressed plurality of memory cells operatively coupled with a computer processor, wherein each memory cell is configured to store data representing one of:
an empty state indicating that no object has been stored within the cell, and
an allocated state indicating that a representation of an object has been stored within the cell; and
an executable program code that uses a single atomic conditional write instruction equivalent and a plurality of non-atomic instructions to transition one of the memory cells from the empty state to the allocated state, wherein the atomic conditional write instruction equivalent is implemented using at most two machine instructions of the computer processor.
2. The object dictionary of claim 1 , wherein each memory cell is of a size of a pointer of the computer processor.
3. The object dictionary of claim 1 , wherein the representation of the object of a cell in the allocated state comprises all the data of the object that it represents.
4. The object dictionary of claim 1 , wherein the representation of the object of a cell in the allocated state comprises a pointer to the object that it represents.
5. A computer-implemented method comprising:
setting each of a linearly-addressed plurality of memory cells to represent one of:
an empty state indicating that no object has been stored within the cell, and
an allocated state indicating that a representation of an object has been stored within the cell; and
employing a single atomic conditional write instruction equivalent and a plurality of non-atomic instructions to transition one of the memory cells from the empty state to the allocated state, wherein no memory cell storing data representing the allocated state thereafter transitions to the empty state, and wherein the atomic conditional write instruction equivalent is implemented using at most two machine instructions of a computer processor.
6. The computer-implemented method of claim 5 , wherein each memory cell is of a size of a pointer of the computer processor.
7. The computer-implemented method of claim 5 , wherein the representation of the object of a cell in the allocated state comprises all the data of the object that it represents.
8. The computer-implemented method of claim 5 , wherein the representation of the object of a cell in the allocated state comprises a pointer to the object that it represents.
9. The computer-implemented method claim 5 , wherein the transition of the one of the memory cells from the empty state to the allocated state is lock-free.
10. The computer-implemented method claim 5 , wherein the transition of the one of the memory cells from the empty state to the allocated state does not acquire a lock on all of the plurality of memory cells.
11. The computer-implemented method claim 5 , wherein the single atomic conditional write instruction equivalent never leads the computer processor to block.
12. A non-transitory computer-readable storage medium having executable computer program instructions embodied therein, actions of the computer program instructions comprising:
setting each of a linearly-addressed plurality of memory cells to represent one of:
an empty state indicating that no object has been stored within the cell, and
an allocated state indicating that a representation of an object has been stored within the cell; and
employing a single atomic conditional write instruction equivalent and a plurality of non-atomic instructions to transition one of the memory cells from the empty state to the allocated state, wherein the atomic conditional write instruction equivalent is implemented using at most two machine instructions of a computer processor.
13. The non-transitory computer-readable storage medium of claim 12 , wherein each memory cell is of a size of a pointer of the computer processor.
14. The non-transitory computer-readable storage medium of claim 12 , wherein the representation of the object of a cell in the allocated state comprises all the data of the object that it represents.
15. The non-transitory computer-readable storage medium of claim 12 , wherein the representation of the object of a cell in the allocated state comprises a pointer to the object that it represents.
16. The non-transitory computer-readable storage medium of claim 12 , wherein the transition of the one of the memory cells from the empty state to the allocated state is lock-free.
17. The non-transitory computer-readable storage medium of claim 12 , wherein the transition of the one of the memory cells from the empty state to the allocated state does not acquire a lock on all of the plurality of memory cells.
18. The non-transitory computer-readable storage medium of claim 12 , wherein the single atomic conditional write instruction equivalent never leads the computer processor to block.