Integrated optical receiver architecture for high speed optical I/O applications
An integrated optical receiver architecture may be used to couple light between a multi-mode fiber (MMF) and silicon chip which includes integration of a silicon de-multiplexer and a high-speed Ge photo-detector. The proposed architecture may be used for both parallel and wavelength division multiplexing (WDM) based optical links with a data rate of 25 Gb/s and beyond.
1. A method for fabricating an integrated optical receiver comprising:
providing a silicon on insulator (Sal) wafer comprising a silicon handle layer, a buried oxide (BOX) layer, a silicon waveguide layer and a hard mask (HM) oxide layer;
etching a taper in the HM layer and the silicon waveguide layer;
etching a V-groove in a portion of the silicon layer;
filling taper and the V-groove with oxide to form a total internal reflection (TIR) mirror structure;
planarizing the TIR mirror structure;
bonding a silicon wafer to the TIR mirror structure;
flipping the SOl wafer over;
removing the silicon handle layer; and
fabricating a high-speed photo-detector (PO) over the V-groove.
2. The method as recited in claim 1 , further comprising:
fabricating a de-multiplexer in the silicon waveguide layer.
3. The method as recited in claim 2 wherein the de-multiplexer comprises a diffraction grating.
4. The method as recited in claim 3 wherein the diffraction grating comprises an etched Echelle grating capable of de-multiplexing both single-mode and multimode beams.
5. The method as recited in claim 1 wherein the photo-detector comprises a germanium (Ge) photodetector.
6. The method as recited in claim 1 wherein the taper comprises a wide end approximately 20-30 um in thickness and a narrower end approximately 10 um in thickness.
7. The method as recited in claim 1 wherein the V-groove is etched to the BOX layer.
8. The method as recited in claim 1 wherein the V-groove is etched short of the BOX layer.
9. A system for fabricating an integrated optical receiver comprising:
a silicon on insulator (Sal) wafer comprising a silicon handle layer, a buried oxide (BOX) layer, a silicon waveguide layer and a hard mask (HM) oxide layer;
a taper etched in the HM layer and the silicon waveguide layer;
a V-groove etched in a portion of the silicon layer;
wherein the taper and the V-groove are filled with oxide to form a total internal reflection (TIR) minor structure, wherein the TIR mirror structure is planarized and bonded with a silicon wafer that is flipped over; and
wherein the silicon handle layer is removed, and wherein a high-speed photo-detector (PO) is fabricated over the V-groove.
10. The system as recited in claim 9 , further comprising:
a de-multiplexer fabricated in the silicon waveguide layer.
11. The system as recited in claim 10 wherein the de-multiplexer comprises a diffraction grating.
12. The system as recited in claim 11 wherein the diffraction grating comprises an etched Echelle grating capable of de-multiplexing both single-mode and multi-mode beams.
13. The system as recited in claim 9 wherein the photo-detector comprises a germanium (Ge) photodetector.
14. The system as recited in claim 9 wherein the taper comprises a wide end approximately 20-30 um in thickness and a narrower end approximately 10 um in thickness.
15. The system as recited in claim 9 wherein the V-groove is etched to the BOX layer.
16. The system as recited in claim 9 wherein the V-groove is etched short of the BOX layer.