IP Library Granted Patent US 8,924,760
Granted Patent B2
US 8,924,760 · App. 12/655,881 · Granted Dec 30, 2014

Scheduler with voltage management

Inventors: Xiaoming Li (Irvine, CA); Surinderjit S. Dhaliwal (Laguna Niguel, CA)
Assignee: Mindspeed Technologies, Inc.
G06F1/3203G06F1/324G06F1/329G06F1/3296G06F9/4893Y02B60/1217Y02B60/1285Y02B60/144
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Quick Facts
Patent No.
US 8,924,760
App. No.
12/655,881
Granted
Dec 30, 2014
Kind
B2
Abstract

There is provided a method of scheduler assisted power management for semiconductor devices. By accessing and analyzing workload data for tasks to be completed, a scheduler may provide finer grained control for determining and implementing an efficient power management policy. In this manner, tasks with completion deadlines can be allocated sufficient resources without wasteful power consumption resulting from ramping up of performance through overestimating of voltage or frequency increases. Additionally, power management may be planned for longer periods, rather than looking only at immediate data to be processed and constantly fluctuating voltage and frequency. In this manner, power management can run more smoothly and efficiently compared to conventional means of power management that ignore data from a scheduler when determining power management policy.

Claims (35)

1. A method of managing power for a semiconductor system using a scheduler, the method comprising:

accessing workload data of said scheduler, said workload data describing a plurality of tasks to be executed on a plurality of processing blocks of said semiconductor system;

determining a power management policy based on analyzing said workload data, wherein said analyzing said workload data includes analyzing said data packet content types of said workload data to distinguish said data packet content types based on severity of packet loss;

adjusting a power configuration of said semiconductor system according to said power management policy, wherein said adjusting said power configuration comprises reducing an operating frequency of said one processing block of said plurality of processing blocks in response to said analyzing of said data packet content types of said workload data to distinguish said data packet content types based on severity of packet loss; and

operating said one processing block of said plurality of processing blocks at said reduced operating frequency in response to said analyzing of said data packet content types of said workload data.

2. The method of claim 1 , wherein said adjusting said power configuration further comprises increasing said operating frequency and a voltage supplied to said one processing block of said plurality of processing blocks after said operating said one processing block of said plurality of processing blocks at said reduced operating frequency, said method further comprising:

operating said one processing block of said plurality of processing blocks at said increased operating frequency and voltage.

3. The method of claim 1 , wherein said adjusting said power configuration further comprises reducing a voltage supplied to said one processing block of said plurality of processing blocks, and wherein said operating further comprises operating said one processing block of said plurality of processing blocks at said reduced voltage.

4. The method of claim 1 , wherein said power management policy is configured to optimally meet completion deadlines of said workload data.

5. The method of claim 1 , wherein said plurality of tasks include routing of network packets.

6. The method of claim 5 , wherein said analyzing said workload uses Quality of Service (QoS) rules to prioritize processing of network packets.

7. The method of claim 1 , wherein said plurality of tasks include executing a thread on a processor core.

8. The method of claim 7 , wherein said analyzing said workload uses task parameters of said thread.

9. A scheduler for managing power of a semiconductor system, the scheduler comprising a processor configured to:

access workload data describing a plurality of tasks to be executed on a plurality of processing blocks of said semiconductor system;

determine a power management policy based on analyzing said workload data, wherein said analyzing said workload data includes analyzing said data packet content types of said workload data to distinguish said data packet content types based on severity of packet loss;

adjust a power configuration of said semiconductor system according to said power management policy, wherein adjusting said power configuration comprises reducing an operating frequency of said one processing block of said plurality of processing blocks in response to said analyzing of said data packet content types of said workload data to distinguish said data packet content types based on severity of packet loss; and

operate said one processing block of said plurality of processing blocks at said reduced operating frequency in response to said analyzing of said data packet content types of said workload data.

10. The scheduler of claim 9 , wherein the processor is configured to further adjust said power configuration by increasing said operating frequency and a voltage supplied to one processing block of said plurality of processing blocks after operating said one processing block of said plurality of processing blocks at said reduced operating frequency, said processor is configured to:

operate said one processing block of said plurality of processing blocks at said increased operating frequency and voltage.

11. The scheduler of claim 9 , wherein the processor is configured to further adjust said power configuration by reducing a voltage supplied to said one processing block of said plurality of processing blocks, and wherein operating said one processing block further comprises operating said one processing block of said plurality of processing blocks at said reduced voltage.

12. The scheduler of claim 9 , wherein said power management policy is configured to optimally meet completion deadlines of said workload data.

13. The scheduler of claim 9 , wherein said plurality of tasks include routing of network packets.

14. The scheduler of claim 13 , wherein the processor is configured to analyze said workload by using Quality of Service (QoS) rules to prioritize processing of network packets.

15. The scheduler of claim 9 , wherein said plurality of tasks include executing a thread on a processor core.

16. The scheduler of claim 15 , wherein the processor is configured to analyze said workload by using task parameters of said thread.

17. The scheduler of claim 15 , wherein the processor is configured to adjust said power configuration comprises decreasing said voltage supplied to said one processing block of said plurality of processing blocks without zeroing said voltage to turn off said one processing block of said plurality of processing blocks.

18. The scheduler of claim 15 , wherein said data packet content types include a voice packet type and a video packet type, and wherein the processor is configured to distinguish between said voice packet type and said video packet type for determining said power management policy.

19. The method of claim 1 , wherein said adjusting said power configuration comprises decreasing said voltage supplied to said one processing block of said plurality of processing blocks without zeroing said voltage to turn off said one processing block of said plurality of processing blocks.

20. The method of claim 1 , wherein said data packet content types include voice a packet type and a video packet type, and wherein said analyzing said workload data includes distinguishing between said voice packet type and said video packet type for determining said power management policy.

21. A method of managing power for a semiconductor system using a scheduler, the method comprising:

accessing workload data of said scheduler, said workload data describing a plurality of tasks to be executed on a plurality of processing blocks of said semiconductor system;

determining a power management policy based on analyzing said workload data, wherein said analyzing said workload data includes analyzing said data packet content types of said workload data to distinguish said data packet content types based on severity of packet loss; and

adjusting a power configuration of said semiconductor system according to said power management policy in response to said analyzing of said data packet content types of said workload data to distinguish said data packet content types based on severity of packet loss;

wherein said data packet content types include a voice packet type and a video packet type, and wherein said analyzing said workload data includes distinguishing between said voice packet type and said video packet type for determining said power management policy.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2017
From: MINDSPEED TECHNOLOGIES, LLC
To: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
Reel/Frame 044791/0600 →
CHANGE OF NAME Recorded Aug 10, 2016
From: MINDSPEED TECHNOLOGIES, INC.
To: MINDSPEED TECHNOLOGIES, LLC
Reel/Frame 039645/0264 →
SECURITY INTEREST Recorded May 9, 2014
From: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.; MINDSPEED TECHNOLOGIES, INC.; BROOKTREE CORPORATION
To: GOLDMAN SACHS BANK USA
Reel/Frame 032859/0374 →
RELEASE OF SECURITY INTEREST Recorded May 9, 2014
From: JPMORGAN CHASE BANK, N.A.
To: MINDSPEED TECHNOLOGIES, INC.
Reel/Frame 032861/0617 →
SECURITY INTEREST Recorded Mar 21, 2014
From: MINDSPEED TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 032495/0177 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2010
From: LI, XIAOMING; DHALIWAL, SURINDERJIT S.
To: MINDSPEED TECHNOLOGIES, INC.
Reel/Frame 023817/0683 →
Continuity (1)
Related Publication 20110173478A1 · Jul 14, 2011