IP Library Granted Patent US 8,420,517
Granted Patent B2
US 8,420,517 · App. 12/656,710 · Granted Apr 16, 2013

Methods of forming a multi-doped junction with silicon-containing particles

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Quick Facts
Patent No.
US 8,420,517
App. No.
12/656,710
Granted
Apr 16, 2013
Kind
B2
Abstract

A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron atoms, the substrate comprising a front substrate surface. The method further includes depositing an ink on the front substrate surface in a ink pattern, the ink comprising a set of silicon-containing particles and a set of solvents. The method also includes heating the substrate in a baking ambient to a first temperature and for a first time period in order to create a densified film ink pattern. The method further includes exposing the substrate to a dopant source in a diffusion furnace with a deposition ambient, the deposition ambient comprising POCl 3 , a carrier N 2 gas, a main N 2 gas, and a reactive O 2 gas at a second temperature and for a second time period, wherein a PSG layer is formed on the front substrate surface and on the densified film ink pattern; and heating the substrate in a drive-in ambient to a third temperature; wherein a first diffused region with a first sheet resistance is formed under the front substrate surface covered by the densified film ink pattern, and a second diffused region with a second sheet resistance is formed under the front substrate surface not covered with the densified film ink pattern, and wherein the first sheet resistance is substantially smaller than the second sheet resistance.

Claims (27)

1. A method of forming a multi-doped junction on a substrate, comprising:

providing the substrate doped with boron atoms, the substrate comprising a front substrate surface;

depositing an ink on the front substrate surface in an ink pattern, the ink comprising a set of silicon-containing particles and a set of solvents, wherein the set of silicon-containing particles is intrinsic;

heating the substrate in a baking ambient to a first temperature and for a first time period in order to create a densified film ink pattern;

exposing the substrate to a dopant source in a diffusion furnace with a deposition ambient, the deposition ambient comprising POCl 3 gas at a second temperature and for a second time period, wherein a PSG layer is formed on the front substrate surface and on the densified film ink pattern; and

heating the substrate in a drive-in ambient to a third temperature and for a third time period;

wherein a first diffused region with a first sheet resistance is formed under the front substrate surface covered by the densified film ink pattern, and a second diffused region with a second sheet resistance is formed under the front substrate surface not covered with the densified film ink pattern, and

wherein the first sheet resistance is substantially smaller than the second sheet resistance.

2. The method of claim 1 , wherein the first temperature is between about 100° C. and about 600° C. and the first time period is between about 10 seconds and about 20 minutes.

3. The method of claim 1 , wherein the first temperature is between about 300° C. and about 500° C. and the first time period is between about 30 seconds and about 3 minutes.

4. The method of claim 1 , wherein the first temperature is about 400° C. and the first time period is about 1 minute.

5. The method of claim 1 , wherein the deposition ambient comprising POCl 3 gas, carrier N 2 gas and reactive O 2 , gas, and wherein a ratio of the carrier N 2 gas to the reactive O 2 gas is between about 1:1 to about 1.5:1, the second temperature is between about 700° C. and about 1000° C., and the second time period of about 5 minutes and about 35 minutes.

6. The method of claim 1 , wherein the second temperature is between about 725° C. and about 850° C., and the second time period is between about 10 minutes and about 35 minutes.

7. The method of claim 1 , wherein the second temperature is between about 750° C. and about 825° C., and the second time period is between about 15 minutes and about 30 minutes.

8. The method of claim 1 , wherein the second temperature is about 800° C. and the second time period is about 20 minutes.

9. The method of claim 1 , wherein the third temperature is between about 850° C. and about 1050° C. and the third time period is between about 10 minutes and about 60 minutes.

10. The method of claim 1 , wherein the third temperature is between about 860° C. and about 950° C. and the third time period is between about 15 minutes and about 30 minutes.

11. The method of claim 1 , wherein the third temperature is about 875° C. and the third time period is about 25 minutes.

12. The method of claim 1 , wherein the first sheet resistance is between about 20 Ohm/sq and about 70 Ohm/sq and the second sheet resistance is between about 70 Ohm/sq and about 140 Ohm/sq.

13. The method of claim 1 , wherein the first sheet resistance is between about 30 Ohm/sq and about 60 Ohm/sq and the second sheet resistance is between about 80 Ohm/sq and about 120 Ohm/sq.

14. The method of claim 1 , wherein the first sheet resistance is between about 30 Ohm/sq and about 50 Ohm/sq and the second sheet resistance is between about 90 Ohm/sq and about 110 Ohm/sq.

15. The method of claim 1 , wherein the baking ambient is one of an inert ambient and an oxidizing ambient.

16. The method of claim 1 , wherein the drive-in ambient is one of an inert ambient and an oxidizing ambient.

17. The method of claim 1 including the step of cleaning the substrate after the step of heating the substrate.

18. The method of claim 1 , wherein the silicon-containing particle is a silicate.

19. The method of claim 1 , wherein the set of silicon-containing particles is intrinsic Si, intrinsic SiOx or intrinsic Si x N y .

20. The method of claim 1 , wherein the set of silicon-containing particles is intrinsic Si.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2021
From: DUPONT ELECTRONICS, INC.
To: SOLAR PASTE, LLC
Reel/Frame 055766/0478 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2020
From: INNOVALIGHT, INC.
To: DUPONT ELECTRONICS, INC.
Reel/Frame 054333/0737 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2010
From: SCARDERA, GIUSEPPE; KAN, SHIHAI; KELMAN, MAXIM; POPLAVSKYY, DMITRY
To: INNOVALIGHT, INC.
Reel/Frame 024330/0649 →