Highly distributed parallel processing on multi-core device
View Patent ↗There is provided a highly distributed multi-core system with an adaptive scheduler. By resolving data dependencies in a given list of parallel tasks and selecting a subset of tasks to execute based on provided software priorities, applications can be executed in a highly distributed manner across several types of slave processing cores. Moreover, by overriding provided priorities as necessary to adapt to hardware or other system requirements, the task scheduler may provide for low-level hardware optimizations that enable the timely completion of time-sensitive workloads, which may be of particular interest for real-time applications. Through this modularization of software development and hardware optimization, the conventional demand on application programmers to micromanage multi-core processing for optimal performance is thus avoided, thereby streamlining development and providing a higher quality end product.
1. A method for an adaptive scheduler to distribute tasks for execution on a multi-core system having a plurality of slave processing cores each being one of a plurality of core types, the method comprising:
accessing a plurality of tasks each having an assigned priority and an assigned core type of said plurality of core types;
determining data inputs for each of said plurality of tasks;
selecting a subset of tasks from said plurality of tasks based on said assigned priorities, wherein data inputs of each of said subset of tasks are presently accessible;
overriding said assigned core type of at least one of said tasks in said subset of tasks to assign said at least one of said tasks to a different core type of plurality of core types than said assigned core type for said at least one of said tasks;
recognizing patterns of said plurality of tasks;
predicting particular types of additional tasks to follow, based on said patterns; and
distributing said subset of tasks to said plurality of slave processing cores of said multi-core system, according to said predicting of said particular types of said additional tasks to follow, based on said patterns;
wherein said particular types of said additional tasks include processing at least one of particular data types and particular operations.
2. The method of claim 1 , wherein said overriding includes translating instructions for said at least one of said tasks designed for execution on said assigned core type to be executed on said different core type.
3. The method of claim 1 further comprising, prior to said selecting, overriding one or more assigned priorities of said plurality of tasks.
4. The method of claim 3 , wherein said overriding uses a state of said plurality of slave processing cores.
5. The method of claim 3 , wherein said overriding uses a state of a memory of said multi-core system.
6. The method of claim 5 , wherein said state of said memory comprises a buffer fill size within said memory.
7. The method of claim 3 , wherein said overriding uses a state of a hardware component of said multi-core system.
8. The method of claim 1 , wherein said assigned core type comprises one of a custom digital signal processor (DSP), a general DSP, and an embedded processor core.
9. The method of claim 8 , wherein said overriding of said assigned core type assigns said at least one of said tasks from said embedded processor core to execute on said general DSP.
10. The method of claim 1 , wherein said particular data types include floating point numbers and said particular operations include one of turbo/viterbi decoding, fast Fourier transforms (FFT/IFFT), and matrix inversion.
11. A multi-core system comprising:
a lower sub-system including an adaptive scheduler and a plurality of slave processing cores each being one of a plurality of core types, said adaptive scheduler configured to:
access a plurality of tasks each having an assigned priority and an assigned core type of said plurality of core types;
determine data inputs for each of said plurality of tasks;
select a subset of tasks from said plurality of tasks based on said assigned priorities, wherein data inputs of each of said subset of tasks are presently accessible;
override said assigned core type of at least one of said tasks in said subset of tasks to assign said at least one of said tasks to a different core type of plurality of core types than said assigned core type for said at least one of said tasks;
recognize patterns of said plurality of tasks;
predict particular types of additional tasks to follow, based on said patterns; and
distribute said subset of tasks to said plurality of slave processing cores, according to predicting said particular types of said additional tasks to follow, based on said patterns;
wherein said particular types of said additional tasks include processing at least one of particular data types and particular operations.
12. The system of claim 11 , wherein overriding includes translating instructions for said at least one of said tasks designed for execution on said assigned core type to be executed on said different core type.
13. The system of claim 11 , wherein prior to said selecting, said adaptive scheduler is further configured to override one or more assigned priorities of said plurality of tasks.
14. The system of claim 13 , wherein said adaptive scheduler is further configured to override using a state of said plurality of slave processing cores.
15. The system of claim 13 , wherein said adaptive scheduler is further configured to override using a state of a memory of said multi-core system.
16. The system of claim 15 , wherein said state of said memory comprises a buffer fill size within said memory.
17. The system of claim 13 , wherein said adaptive scheduler is further configured to override using a state of a hardware component of said multi-core system.
18. The system of claim 11 , wherein said assigned core type comprises one of a custom digital signal processor (DSP), a general DSP, and an embedded processor core.
19. The system of claim 18 , wherein overriding of said assigned core type assigns said at least one of said tasks from said embedded processor core to execute on said general DSP.
20. The system of claim 11 , wherein said particular data types include floating point numbers and said particular operations include one of turbo/viterbi decoding, fast Fourier transforms (FFT/IFFT), and matrix inversion.