Data block size management in a communication system utilizing hybrid automatic repeat requests with soft combining

1. A method of operating a first transceiver that supports hybrid Automatic Repeat Request (hybrid ARQ) functionality, the method comprising:

initially operating the first transceiver to transmit data blocks having a nominal maximum data block size, M 0 ; and

detecting that a second transceiver does not have sufficient soft buffer memory space to store data blocks associated with an anticipated number of active hybrid ARQ processes, and in response thereto operating the first transceiver to transmit data blocks having a reduced data block size, M′.

2. The method of claim 1 , wherein:

the nominal maximum data block size, M 0 , is used when the first transceiver has a nominal number, N 0 , of active hybrid ARQ processes; and

the anticipated number of active hybrid ARQ processes is a number, N′ of active hybrid ARQ processes, wherein N′>N 0 .

3. The method of claim 2 , wherein:

N′=N 0 +Δ, wherein Δ is an amount by which the anticipated number of active hybrid ARQ processes exceeds the nominal number of active hybrid ARQ processes;

B is a total amount of soft buffer capability in the second transceiver;

R is a code rate of a data block encoding; and

the reduced data block size, M′, satisfies:

M′=R ×( B/N ′)= R ×( B /( N 0 +Δ)).

4. The method of claim 2 , comprising:

allocating an equal number of bits to each of the anticipated number of active hybrid ARQ processes.

5. The method of claim 1 , wherein detecting that the second transceiver does not have sufficient soft buffer memory space to store data blocks associated with the anticipated number of active hybrid ARQ processes comprises:

detecting that a propagation delay between the first transceiver and the second transceiver is greater than TN 0 , wherein T is a transmission time interval for one data block.

6. The method of claim 1 , wherein detecting that the second transceiver does not have sufficient soft buffer memory space to store data blocks associated with the anticipated number of active hybrid ARQ processes comprises:

detecting that the second transceiver has less processing capability than a nominal amount.

7. The method of claim 5 , comprising:

in response to said detecting, increasing the number of active hybrid ARQ processes.

8. The method of claim 1 , wherein detecting that the second transceiver does not have sufficient soft buffer memory space to store data blocks associated with the anticipated number of active hybrid ARQ processes comprises:

maintaining a count value that represents the amount of not-yet-acknowledged transmitted data blocks; and

detecting that the count value satisfies a predetermined relationship with a threshold count value.

9. A transceiver that supports hybrid Automatic Repeat Request (hybrid ARQ) functionality, the transceiver comprising:

logic configured to initially operate the transceiver to transmit data blocks having a nominal maximum data block size, M 0 ; and

logic configured to detect that a second transceiver does not have sufficient soft buffer memory space to store data blocks associated with an anticipated number of active hybrid ARQ processes, and in response thereto to operate the transceiver to transmit data blocks having a reduced data block size, M′.

10. The transceiver of claim 9 , wherein:

the nominal maximum data block size, M 0 , is used when the transceiver has a nominal number, N 0 , of active hybrid ARQ processes; and

the anticipated number of active hybrid ARQ processes is a number, N′ of active hybrid ARQ processes, wherein N′>N 0 .

11. The transceiver of claim 10 , wherein:

N′=N 0 +Δ, wherein Δ is an amount by which the anticipated number of active hybrid ARQ processes exceeds the nominal number of active hybrid ARQ processes;

B is a total amount of soft buffer capability in the second transceiver;

R is a code rate of a data block encoding; and

the reduced data block size, M′, satisfies:

M′=R ×( B/N ′)= R ×( B /( N 0 +Δ)).

12. The transceiver of claim 10 , comprising:

logic configured to allocate an equal number of bits to each of the anticipated number of active hybrid ARQ processes.

13. The transceiver of claim 9 , wherein the logic configured to detect that the second transceiver does not have sufficient soft buffer memory space to store data blocks associated with the anticipated number of active hybrid ARQ processes comprises:

logic configured to detect that a propagation delay between the transceiver and the second transceiver is greater than TN 0 , wherein T is a transmission time interval for one data block.

14. The transceiver of claim 9 , wherein the logic configured to detect that the second transceiver does not have sufficient soft buffer memory space to store data blocks associated with the anticipated number of active hybrid ARQ processes comprises:

logic configured to detect that the second transceiver has less processing capability than a nominal amount.

15. The transceiver of claim 13 , comprising:

logic configured to increase the number of active hybrid ARQ processes in response to said detecting.

16. The transceiver of claim 9 , wherein the logic configured to detect that the second transceiver does not have sufficient soft buffer memory space to store data blocks associated with the anticipated number of active hybrid ARQ processes comprises:

logic configured to maintain a count value that represents the amount of not-yet-acknowledged transmitted data blocks; and

logic configured to detect that the count value satisfies a predetermined relationship with a threshold count value.