Spacer, and its manufacturing method
View Patent ↗Provided are a spacer capable of avoiding a poor connection due to the suction of solder when the clearance width between a soldered semiconductor device and a printed circuit board is made constant, and a manufacturing method for the spacer. The spacer includes an electrically insulating base member, and at least one solder guiding terminal. The base member has a bottom face, a top face and at least one side face, of which the bottom face and the top face are out of contact with each other whereas the side face contacts one or both the bottom face and the top face. The solder guiding terminal covers the bottom face partially, the top face partially, and the side face partially or wholly. A solder guiding face as the surface of a portion of the solder guiding terminal covering the side face is not normal to the bottom face.
1. A spacer placed in a clearance to keep width of the clearance between a mounting board and an electronic component when soldering a pad of the mounting board and a pad of the electronic component mounted on the board by using a predetermined amount of solder, the spacer including a solder guiding face for being connected to the solder used for the soldering, wherein
the solder guiding face is in a shape in which one end is protruded towards an outer side than the other end.
2. The spacer as claimed in claim 1 , wherein an interior angle formed between the solder guiding face and a face of the spacer is an acute angle.
3. The spacer as claimed in claim 1 , wherein the solder guiding face is a curved face.
4. The spacer as claimed in claim 1 , wherein the solder guiding face is a concave face.
5. The spacer as claimed in claim 1 , wherein the solder guiding face is a flat face.
6. The spacer as claimed in claim 1 , comprising:
a plurality of terminals that form the solder guiding faces; and
a built-in capacitance element which is connected to the terminals.
7. The spacer as claimed in claim 6 , wherein the capacitance element is a solid aluminum electrolytic capacitor.
8. The spacer as claimed in claim 6 , wherein the capacitance element is a ceramic capacitor.
9. The spacer as claimed in claim 1 , comprising:
a plurality of terminals that form the solder guiding faces; and
a built-in capacitance circuit which is connected to the terminals.
10. A large scale integrated circuit formed by mounting a semiconductor circuit chip having a semiconductor chip pad on its surface onto an interposer having an interposer pad on its surface, wherein:
the interposer pad and the semiconductor chip pad are connected by soldering;
the spacer as claimed in claim 1 is provided in a clearance between the semiconductor circuit chip and the interposer; and
the solder guiding face of the spacer, the interposer pad, and the semiconductor chip pad are connected by soldering.
11. A printed circuit board having a PWB resin part including a PWB pad on its surface, to which a slave board having a slave board pad on its surface is mounted, wherein:
the PWB pad and the slave board pad are connected by soldering;
the spacer as claimed in claim 1 is provided in a clearance at a connecting position of the slave board; and
the solder guiding face of the spacer, the PWB pad, and the slave board pad are connected by soldering.