Granted Patent B2

US 8,228,123 · App. 12/674,906 · Granted Jul 24, 2012

Abstract

Claims (36)

1. An electronic circuit comprising a Doherty amplifier, wherein:

the Doherty amplifier comprises:

an input, an output, a main stage and a peak stage; and

an output network connecting an output node of the main stage and an output node of the peak stage to the output;

the output network comprises:

a first inductor coupled between the output node of the main stage and the output node of the peak stage;

a shunt capacitor coupled between the output node of the main stage and signal ground in parallel to a parasitic capacitance of the main stage; and

a shunt inductor coupled between the output node of the main stage and signal ground, wherein the shunt capacitor and shunt inductor are configured and arranged to compensate for an output impedance of the Doherty amplifier for at least one signal frequency greater than 2.2 GHz.

2. The circuit of claim 1 , wherein:

the input is accommodated on a first substrate;

the main stage and the peak stage are integrated on a second substrate; and

the output is accommodated on a third substrate.

3. The circuit of claim 2 , wherein:

the input network comprises a second inductor;

the second inductor comprises a bond wire between the first substrate and the second substrate; and

the shunt inductor comprises a further bond wire between the second substrate and the third substrate.

4. The circuit of claim 1 , wherein the first inductor comprises a plurality of bond wires, and wherein currents in adjacent ones of the bond wires run in substantially anti-parallel directions.

5. The circuit of claim 3 , wherein:

at least a specific one of the first inductor, second inductor and shunt inductor comprises a plurality of bond wires; and

currents in adjacent ones of the bond wires of the specific inductor run in substantially anti-parallel directions.

6. The circuit of claim 3 , wherein:

each of the first inductor, the second inductor and the shunt inductor comprises a respective bond wire;

the bond wires of at least one pair of the first inductor, the second inductor and the shunt inductor have substantially perpendicular orientations.

7. The circuit of claim 2 , further comprising a further inductor that is partly integrated in the second substrate and partly implemented with bond wires forming a back-and-forth path between the first and second substrates.

8. An electronic circuit comprising a Doherty amplifier, wherein:

the Doherty amplifier comprises:

an input, an output, a main stage and a peak stage; and

an output network connecting an output node of the main stage and an output node of the peak stage to the output;

the output network comprises:

a first inductor coupled between the output node of the main stage and the output node of the peak stage;

a shunt capacitor coupled between the output node of the main stage and signal ground in parallel to a parasitic capacitance of the main stage; and

a shunt inductor coupled between the output node of the main stage and signal ground; and

at least one further Doherty amplifier arranged in parallel with the Doherty amplifier first-mentioned.

9. The circuit of claim 8 , wherein the shunt capacitor and shunt inductor are configured and arranged to compensate for an output impedance of the Doherty amplifier for at least one signal frequency greater than 2.2 GHz.

10. The circuit of claim 9 , wherein the shunt capacitor and shunt inductor form part of a CLC circuit selected to set the selected frequency.

11. The circuit of claim 1 , wherein the shunt capacitor and shunt inductor form part of a CLC circuit selected to set the selected frequency.

Assignments (13)