Atom chip device
Ultra-cold (nano-Kelvin) neutral atoms can be trapped, manipulated, and measured, using integrated current carrying micro-structures on a nearby surface (Atom Chips). This can be utilized for the realization of ultra-sensitive sensors and quantum computation devices based on the quantum mechanical properties of the trapped atoms. However, harmful processes arise from the interactions between the atoms and the nearby surface. According to the present invention these harmful processes can be highly suppressed by using electrically anisotropic materials. It is shown that time-independent trapping potential corrugation leading to fragmentation of the trapped atom cloud can be suppressed, and that time dependent noise processes arising from the coupling of atoms to the nearby surface, and leading to loss of atoms from the trap, heating and loss of coherence can be significantly reduced.
1. An atom chip device for trapping, manipulating and measuring atoms in an ultra high vacuum chamber, for reducing heating and decoherence rates, for increasing the lifetime of the trapped atoms, and for suppression of atom cloud fragmentation, the atom chip device comprising:
(a) at least one atom chip conductive element, having a flat surface, wherein said at least one atom chip conductive element is made of metal, wherein at least part of said atom chip conductive element is an electrically anisotropic material, and wherein said at least one conductive element has a working temperature, and said electrically anisotropic material has, at said working temperature, lower resistivity and temperature/resistivity ratio values than both resistivity and temperature/resistivity ratio values of gold at room temperature.
2. The atom chip device of claim 1 , wherein said reduction of heating and decoherence rates, of said trapped atoms compared with those achievable by using atom chip device having conductive elements made of pure metals is at least smaller by a factor of 100, the atom chip device further comprising:
(b) an atom chip functional layer, having a flat surface, wherein said atom chip functional layer is made of metal, wherein at least part of said metal is made of an electrically anisotropic material, and wherein said atom chip functional layer is isolated electrically from said conductive element.
3. The atom chip device of claim 2 further comprising:
(c) an atom chip substrate, wherein said atom chip substrate gives mechanical strength to said atom chip device; and
(d) an atom chip insulated layer, disposed on said atom chip substrate, wherein said atom chip insulated layer electrically insulates said at least one conductive element from said functional layer.
4. The atom chip device of claim 2 , wherein said at least one atom chip conductive element's flat surface and said functional layer's flat surface are substantially on the same plane.
5. The atom chip device of claim 2 , wherein said at least one atom chip conductive element's flat surface and said functional layer's flat surface are substantially on different planes.
6. The atom chip device of claim 1 further comprising:
(e) at least two atom chip conductive elements, having flat surfaces.
7. The atom chip device of claim 2 wherein said atom chip conductive element and said atom chip functional layer are both substantially made of said electrically anisotropic material.
8. The atom chip device of claim 1 wherein said at least one atom chip conductive element's working temperature is less than room temperature.
9. The atom chip device of claim 1 wherein said at least one atom chip conductive element has a geometric shape selected from a group consisting of a straight line, Z-shape, conveyer belt shape, or U-shape.
10. The atom chip device of claim 1 wherein said at least one atom chip conductive element has a geometric Z-shape.
11. The atom chip device of claim 1 wherein said at least one atom chip conductive element has a geometric U-shape.
12. The atom chip device of claim 1 wherein said at least one conductive element has a geometric conveyer belt shape.
13. The atom chip device of claim 1 wherein said at least one atom chip conductive element's electrically anisotropic material is made of hyper-oriented pyro-graphite (HOPG), having anisotropy ratio ρ c /ρ a of approximately 3750 at room temperature.
14. The atom chip device of claim 1 wherein said at least one atom chip conductive element's electrically anisotropic material is made of SrNbO 3.41 , having an a-axis resistivity of ρ a =4.6·10 −4 Ωcm and anisotropy ratio ρ a :ρ b :ρ c of approximately 1:10 2 :10 4 at room temperature (300K), and ρ a =2.7·10 −3 Ωcm and anisotropy ratio ρ a :ρ b :ρ c of approximately 1:37:10 5 at approximately 7.5 K.
15. An atom chip device for trapping, manipulating and measuring atoms in ultra high vacuum chamber, for reducing of heating- and decoherence-rates and for increasing the lifetime of the trapped atoms, the atom chip device comprising:
(a) at least one atom chip conductive element, having a flat surface, wherein said at least one atom chip conductive element is made of metal, wherein at least part of said metal is an electrically anisotropic material, and wherein said at least one atom chip conductive element has a working temperature, wherein said at least one atom chip conductive element working temperature is less than room temperature, wherein said at least one atom chip conductive element has a geometric shape selected from a group consisting of a straight line, Z-shape, conveyer belt shape, or U-shape, and wherein said at least one atom chip conductive element's is made of an electrically anisotropic material having both resistivity and temperature/resistivity ratio values at said working temperature lower than both resistivity and temperature/resistivity ratio values of gold at room temperature;
(b) an atom chip functional layer, having a flat surface, wherein said atom chip functional layer is made of metal, wherein at least part of said metal is an electrically anisotropic material, and wherein said atom chip functional layer is electrically isolated from said conductive element;
(c) an atom chip substrate, wherein said atom chip substrate gives mechanical strength to said atom chip device; and
(d) an atom chip's first insulated layer, disposed on said substrate, wherein said atom chip's first insulated layer electrically insulates said at least one conductive element from said functional layer.
16. The atom chip device of claim 15 wherein said at least one atom chip's first conductive element's electrically anisotropic material is made of hyper-oriented pyro-graphite (HOPG), having anisotropy ratio ρ c /ρ a of approximately 3750 at room temperature.
17. The atom chip device of claim 15 wherein said at least one atom chip's first conductive element's electrically anisotropic material is made of SrNbO 3.41 , having an a-axis resistivity of ρ a =4.6·10 −4 Ωcm and anisotropy ratio ρ a :ρ b :ρ c of approximately 1:10 2 :10 4 at room temperature (300K), and ρ a =2.7·10 −3 Ωcm and anisotropy ratio ρ a :ρ b :ρ c of approximately 1:37:10 5 at approximately 7.5 K.
18. A method of trapping, manipulating and measuring atoms comprising the stages of:
(a) providing an atom chip device including:
(i) at least one atom chip conductive element, having a flat surface, wherein said at least one atom chip conductive element is made of metal, wherein at least part of said metal is an electrically anisotropic material, wherein said at least one atom chip conductive element has a working temperature, wherein said at least one atom chip conductive element working temperature is less than room temperature, wherein said at least one atom chip conductive element has a geometric shape selected from a group consisting of a straight line, Z-shape, conveyer belt shape, or U-shape, and wherein said at least one conductive element's dilute alloy metal is made of an alloy having both resistivity and temperature/resistivity ratio values at temperature lower than both resistivity and temperature/resistivity ratio values of gold at room temperature;
(ii) an atom chip functional layer, having a flat surface, wherein said atom chip functional layer is made of metal, wherein at least part of said metal is an electrically anisotropic material, and wherein said functional layer is electrically isolated from said conductive element;
(iii) an atom chip substrate, wherein said atom chip substrate gives mechanical strength to said atom chip device; and
(iv) an atom chip's first insulated layer, disposed on said atom chip substrate, wherein said atom chip's first insulated layer electrically insulates said at least one atom chip's first conductive element from said functional layer;
(b) installing said atom chip device inside a chamber, at room temperature and at room pressure, wherein said chamber has the structure of an ultra high vacuum chamber;
(c) closing and sealing said chamber;
(d) lowering the pressure inside said chamber;
(e) supplying atoms to the inside of said chamber; and
(f) connecting said at least one atom chip's first conductive element to an electricity source.
19. The method of claim 18 , further comprising the stage of:
(g) lowering the temperature of said at least one atom chip's first conductive element.