IP Library Granted Patent US 9,325,280
Granted Patent B2
US 9,325,280 · App. 12/675,849 · Granted Apr 26, 2016

Multi-way doherty amplifier

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Quick Facts
Patent No.
US 9,325,280
App. No.
12/675,849
Granted
Apr 26, 2016
Kind
B2
Abstract

An electronic circuit has a multi-way Doherty amplifier. The multi-way Doherty amplifier comprises a two-way Doherty amplifier with a main stage and a first peak stage that are integrated in a semiconductor device; and at least one further peak stage implemented with a discrete power transistor.

Claims (39)

1. An electronic circuit with a multi-way Doherty amplifier, wherein the multi-way Doherty amplifier comprises:

a two-way Doherty amplifier comprising a main stage and a first peak stage that are integrated in a semiconductor device;

at least one further peak stage implemented in a separate semiconductor device,

a first half-wavelength line connecting an output of the Doherty amplifier to an output node, and

a second half-wavelength line connecting an output of the at least one further peak stage to the output node.

2. The circuit of claim 1 , wherein the further peak stage is implemented with a discrete power transistor.

3. The circuit of claim 1 , further including

an input network connected between an input node and each of the two-way Doherty amplifier and the at least one further peak stage, the input network being configured to provide an input at the input node to the respective Doherty amplifier and further peak stage at a predefined phase shift.

4. The circuit of claim 1 , further including

an input network connected between an input node and to each of the two-way Doherty amplifier and the at least one further peak stage, the input network being configured to provide an input at the input node to the respective Doherty amplifier and further peak stage at a predefined phase shift,

the first half-wavelength line connecting the output of the Doherty amplifier to the output node, and

the second half-wavelength line connecting the output of the at least one further peak stage to the output node.

5. The circuit of claim 1 , further including

the first half-wavelength line connecting the output of the Doherty amplifier to the output node,

the second half-wavelength line connecting the output of the at least one further peak stage to the output node, and

the impedance of the first and second half-wavelength lines being about equal to twice the resistance of a load connected to the output node.

6. The circuit of claim 1 , further including

the first half-wavelength line connecting the output of the Doherty amplifier to the output node connected to a load, and the second half-wavelength line connecting the output of the at least one further peak stage to the output node, and

wherein the resistance of the Doherty amplifier, the resistance of the at least one further peak stage, and the impedance of the first and second half-wavelength lines are about equal to twice the resistance of the load.

7. The circuit of claim 1 , wherein the main stage is integrated on a circuit with the first peak stage to transfer heat to the first peak stage, the first peak stage being configured to dissipate heat transferred from the main stage via the circuit.

8. The circuit of claim 1 , further including a quarter-wave connector that connects the input of the two-way Doherty amplifier, which is connected to both the main stage and first peak stage, to the input of the at least one further peak amplifier to effect a 90-degree phase shift between the amplifiers.

9. An electronic circuit with a multi-way Doherty amplifier, wherein the multi-way Doherty amplifier comprises:

a two-way Doherty amplifier comprising a main stage and a first peak stage that are integrated in a semiconductor device; and

at least one further peak stage implemented in a separate semiconductor device, wherein the semiconductor device and the separate semiconductor device are arranged together on a metal flange of a push-pull package.

10. An electronic circuit with a multi-way Doherty amplifier, wherein the multi-way Doherty amplifier comprises:

a two-way Doherty amplifier comprising a main stage and a first peak stage that are integrated in a semiconductor device; and

at least one further peak stage implemented in a separate semiconductor device; and

an additional further peak stage implemented in a further separate semiconductor device, wherein the further peak stage and the additional further peak stage have different sizes.

11. A multi-way Doherty amplifier circuit comprising:

a push-pull package;

an input node;

an output node connected to a load circuit;

a two-way Doherty amplifier including a main stage circuit and a first peak stage circuit integrated on a common semiconductor substrate connected to the push-pull package to transfer heat between the main stage circuit and the first peak stage circuit;

a second peak stage circuit comprising a discrete power transistor on a separate semiconductor substrate connected to the push-pull package to transfer heat between the two-way Doherty amplifier and the second peak stage circuit;

an input network connected between the input node and each of the two-way Doherty amplifier and the second peak stage, the input network being configured to provide an input received at the input node to the Doherty amplifier and the second peak stage respectively at a predefined phase shift;

a first half-wavelength line connecting an output of the Doherty amplifier to the output node;

a second half-wavelength line connecting an output of the second peak stage to the output node; and

wherein the resistance of the Doherty amplifier, the resistance of the at least one further peak stage, and the impedance of the first and second half-wavelength lines are about equal to twice the resistance of the load circuit.

12. The circuit of claim 11 , further comprising a third peak stage circuit comprising a discrete power transistor on another separate semiconductor substrate connected to the push-pull package to transfer heat between the third peak stage and each of the two-way Doherty amplifier and the second peak stage circuit, the third peak stage being of a different size than the second peak stage.

Assignments (12)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
CHANGE OF NAME Recorded Feb 22, 2016
From: SAMBA HOLDCO NETHERLANDS B.V.
To: AMPLEON NETHERLANDS B.V.
Reel/Frame 037876/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2015
From: NXP B.V.
To: SAMBA HOLDCO NETHERLANDS B.V.
Reel/Frame 036630/0574 →