IP Library Granted Patent US 7,880,502
Granted Patent B2
US 7,880,502 · App. 12/677,069 · Granted Feb 1, 2011

Logic circuit

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Quick Facts
Patent No.
US 7,880,502
App. No.
12/677,069
Granted
Feb 1, 2011
Kind
B2
Abstract

A logic circuit with a simple configuration and good current efficiency is provided. The logic circuit includes a two-terminal bistable switching element ( 1 ) having characteristics which maintain states, a first switching element ( 25 ) one end of which is connected to one terminal of the two-terminal bistable switching element ( 1 ), a second switching element ( 29 ) one end of which is connected to the other terminal of the two-terminal bistable switching element ( 1 ) via a resistance element ( 27 ), and first and second pulse input terminals ( 33, 37 ) respectively connected to the one terminal and the other terminal of the two-terminal bistable switching element ( 1 ). A bias voltage is applied across the other end of the first switching element ( 25 ) and the other end of the second switching element ( 27 ), and a trigger pulse is input from the first and second pulse input terminals ( 33, 37 ).

Claims (22)

1. A logic circuit, comprising:

a two-terminal bistable switching element that has characteristics such that a state having a first resistance value is entered when a voltage equal to or less than a first threshold voltage is applied, and a state having a second resistance value different from the first resistance value is entered when a voltage equal to or greater than a second threshold voltage which is greater than the first threshold voltage, is applied, and that has characteristics which maintain each of the states when no voltage is applied;

a first switching element, one end of which is connected to one of the terminals of the two-terminal bistable switching element;

a second switching element, one end of which is connected, via a resistor element, to the other terminal of the two-terminal bistable switching element; and

first and second pulse input terminals, respectively connected to the one terminal and the other terminal of the two-terminal bistable switching element;

wherein when a bias voltage is applied across the other end of the first switching element and the other end of the second switching element, and a trigger pulse is input from the first and second pulse input terminals.

2. The logic circuit according to claim 1 , further comprising third and fourth switching elements, respectively connected to the one terminal and the other terminal of the two-terminal bistable switching element, and characterized in that, when a trigger pulse is input from the second pulse input terminal, the third switching element operates so as to lower the impedance at the one terminal of the two-terminal bistable switching element, and when a trigger pulse is input from the first pulse input terminal, the fourth switching element operates so as to lower the impedance at the other terminal of the two-terminal bistable switching element.

3. The logic circuit according to claim 1 , wherein the two-terminal bistable switching element is a spin-valve element having at least an insulating layer or a nonmagnetic layer, and a pair of ferromagnetic layers having different coercivities and provided so as to sandwich the insulating layer or nonmagnetic layer.

4. The logic circuit according to claim 1 , wherein the two-terminal bistable switching element is a bistable resistance element having an insulating thin film and a pair of electrodes provided so as to sandwich the insulating thin film.

5. The logic circuit according to claim 1 , wherein the two-terminal bistable switching element is an atomic switch that is configured to control, by applying an electric field to a minute gap between a solid electrolytic electrode and a metal electrode, the formation and annihilation of metal clusters in the gap, and to perform electrical on/off switching across the solid electrolyte electrode and the metal electrode by means of this control.

6. The logic circuit according to claim 1 , wherein the first and second pulse input terminals are each connected via a rectifying element.

7. A logic circuit, comprising:

first and second two-terminal bistable switching elements, that have characteristics such that a state having a first resistance value is entered when a voltage equal to or less than a first threshold voltage is applied, and a state having a second resistance value different from the first resistance value is entered when a voltage equal to or greater than a second threshold voltage which is greater than the first threshold voltage is applied, that have characteristics which maintain each of the states when no voltage is applied, and that are connected in series with polarities matching;

first and second switching elements, one end of which is connected to one end and to the other end respectively of the series circuit of the first and second two-terminal bistable switching elements;

a first pulse input terminal, connected to one end and to the other end of the series circuit; and

a second pulse input terminal, connected to the center point of the series circuit;

wherein when a bias voltage is applied across the other end of the first switching element and the other end of the second switching element, and a trigger pulse is input from the first and second pulse input terminals.

8. The logic circuit according to claim 7 , further comprising third, fourth, and fifth switching elements, respectively connected to the one end, the other end, and the center point of the series circuit, and characterized in that, when a trigger pulse is input from the second pulse input terminal, the third and fourth switching elements operate so as to lower the impedance at the one end and at the other end of the series circuit, and when a trigger pulse is input from the first pulse input terminal, the fifth switching element operates so as to lower the impedance at the center point of the series circuit.

9. The logic circuit according to claim 7 , wherein at least one of the first and second two-terminal bistable switching elements is a spin-valve element having at least an insulating layer or a nonmagnetic layer, and a pair of ferromagnetic layers having different coercivities and provided so as to sandwich the insulating layer or nonmagnetic layer.

10. The logic circuit according to claim 7 , wherein at least one of the first and second two-terminal bistable switching elements is a bistable resistance element having an insulating thin film and a pair of electrodes provided so as to sandwich the insulating thin film.

11. The logic circuit according to claim 7 , wherein at least one of the first and second two-terminal bistable switching elements is an atomic switch that is configured to control, by applying an electric field to a minute gap between a solid electrolytic electrode and a metal electrode, the formation and annihilation of metal clusters in the gap, and to perform electrical on/off switching across the solid electrolyte electrode and the metal electrode by means of this control.

12. The logic circuit according to claim 7 , wherein the first and second pulse input terminals are each connected via a rectifying element.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Aug 26, 2011
From: FUJI ELECTRIC HOLDINGS CO., LTD.
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 026891/0655 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2010
From: KAWAKAMI, HARUO; OGIMOTO, YASUSHI
To: FUJI ELECTRIC HOLDINGS CO., LTD.
Reel/Frame 024381/0707 →