IP Library Granted Patent US 7,852,058
Granted Patent B2
US 7,852,058 · App. 12/685,433 · Granted Dec 14, 2010

Power supply regulator with digital control

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Quick Facts
Patent No.
US 7,852,058
App. No.
12/685,433
Granted
Dec 14, 2010
Kind
B2
Abstract

An integrated circuit and method in an integrated circuit for providing electrical power utilizing digital power regulation. Various aspects of the present invention provide an integrated circuit comprising a power supply module that outputs electrical power at an output voltage level. An error determination module may receive a power supply reference signal and a signal indicative of the output voltage level and output a power supply error signal. A digital controller module may receive the power supply error signal, digitally process the power supply error signal, and output a power supply control signal. A power output-monitoring module may monitor the electrical power output from the power supply module and output the signal indicative of the output voltage level. The power supply module may receive the power supply control signal and output the electrical power based, at least in part, on the power supply control signal.

Claims (57)

1. A power supply integrated circuit comprising:

a first module operable to control electrical power provided to a load, the electrical power characterized by a load voltage level;

a second module operable to receive a power supply reference signal and a signal indicative of the load voltage level and output a power supply error signal, where the power supply error signal is based, at least in part, on the difference between the power supply reference signal and the signal indicative of the load voltage level; and

a third module operable to receive the power supply error signal, digitally process the power supply error signal, and output a power supply control signal that is based, at least in part, on the digitally processed power supply error signal;

where the first module is operable to receive the power supply control signal and control the load voltage level based, at least in part, on the power supply control signal; and

where the third module comprises:

a digital filter operable to output a first signal; and

a sigma delta module, communicatively coupled to the digital filter, that receives the first signal and outputs a second signal representative of the first signal.

2. The power supply integrated circuit of claim 1 , wherein:

the first module comprises a power supply module;

the second module comprises an error determination module; and

the third module comprises a digital controller module.

3. The power supply integrated circuit of claim 1 , wherein the second signal output from the sigma delta module is the power supply control signal.

4. The power supply integrated circuit of claim 1 , wherein the first module comprises a switching power supply circuit.

5. The power supply integrated circuit of claim 1 , wherein the first module comprises:

a switching power supply circuit; and

a pulse width modulation module that receives a signal indicative of the power supply control signal and controls operation of the switching power supply circuit based, at least in part, on the signal indicative of the power supply control signal.

6. The power supply integrated circuit of claim 5 , wherein the signal indicative of the power supply control signal comprises information of a duty cycle with which the pulse width modulation module is to control operation of the switching power supply circuit.

7. The power supply integrated circuit of claim 1 , wherein the first module is coupled to a LCR circuit that is external to the power supply integrated circuit, and the first module provides electrical power to the LCR circuit.

8. The power supply integrated circuit of claim 1 , wherein the power supply integrated circuit comprises at least a portion of an LCR circuit that receives electrical power output from the first module.

9. The power supply integrated circuit of claim 1 , wherein the second module comprises an integrator circuit, and the power supply error signal is based, at least in part, on an output of the integrator circuit.

10. The power supply integrated circuit of claim 9 , wherein the integrator circuit comprises an analog integrator circuit.

11. The power supply integrated circuit of claim 10 , wherein the second module comprises an analog-to-digital converter, communicatively coupled to the analog integrator circuit, that outputs the power supply error signal.

12. The power supply integrated circuit of claim 1 , wherein the digital filter comprises a FIR filter.

13. The power supply integrated circuit of claim 12 , wherein the FIR filter is characterized by the transfer function k 1 +k 2 z −1 +k 3 z −2 .

14. The power supply integrated circuit of claim 1 , wherein the digital filter comprises an IIR filter.

15. The power supply integrated circuit of claim 14 , wherein the IIR filter is characterized by the transfer function 1/(1−z −1 ).

16. The power supply integrated circuit of claim 1 , wherein the signal indicative of the load voltage level is a scaled version of the load voltage level.

17. In an integrated circuit, a method for controlling electrical power provided to a load, the electrical power characterized by a load voltage level, the method comprising:

receiving a power supply reference signal;

monitoring the load voltage level;

generating a power supply error signal based, at least in part, on a difference between the received power supply reference signal and the monitored load voltage level;

digitally generating a power supply control signal based, at least in part, on the power supply error signal; and

controlling the electrical power provided to the load in accordance with the power supply control signal;

wherein digitally generating a power supply control signal comprises digitally filtering the power supply error signal to generate a first signal, and sigma delta processing the first signal to generate a second signal representative of the first signal.

18. The method of claim 17 , wherein the generated second signal is the power supply control signal.

19. The method of claim 17 , wherein controlling the electrical power comprises controlling operation of a switching power supply circuit with the power supply control signal.

20. The method of claim 17 , wherein controlling the electrical power comprises:

generating a pulse width modulated signal in accordance with the power supply control signal; and

controlling switching power supply circuitry with the pulse width modulated signal.

21. The method of claim 20 , wherein the power supply control signal comprises information of a duty cycle at which the pulse width modulated signal is be generated.

22. The method of claim 17 , wherein controlling the electrical power comprises providing electrical power to a LCR circuit that is external to the integrated circuit.

23. The method of claim 17 , wherein controlling the electrical power comprises providing electrical power to a LCR circuit, at least a portion of which is internal to the integrated circuit.

24. The method of claim 17 , wherein generating a power supply error signal comprises integrating the difference between the received power supply reference signal and a signal indicative of the monitored load voltage level.

25. The method of claim 24 , wherein integrating the difference comprises integrating the difference between the received power supply reference signal and the signal indicative of the monitored load voltage level in the analog domain.

26. The method of claim 25 , wherein generating a power supply error signal further comprises converting an analog domain signal indicative of the integrated difference to a digital domain signal indicative of the integrated difference.

27. The method of claim 17 , wherein digitally generating a power supply control signal comprises finite impulse response filtering the power supply error signal.

28. The method of claim 27 , wherein finite impulse response filtering the power supply error signal comprises finite impulse response filtering the power supply error signal in accordance with the transfer function k 1 +k 2 z −1 +k 3 z −2 .

29. The method of claim 17 , wherein digitally generating a power supply control signal comprises infinite impulse response filtering the power supply error signal.

30. The method of claim 29 , wherein infinite impulse response filtering the power supply error signal comprises infinite impulse response filtering the power supply error signal in accordance with the transfer function 1/1−z −1 .

31. The method of claim 17 , wherein monitoring the load voltage level comprises monitoring a signal that is a scaled version of the load voltage level.

32. A power supply integrated circuit comprising:

at least one module operable to, at least:

receive a power supply control signal;

control electrical power provided to a load based, at least in part, on the received power supply control signal, the electrical power characterized by a load voltage level;

receive a power supply reference signal and a signal indicative of the load voltage level and output a power supply error signal, wherein the power supply error signal is based, at least in part, on the difference between the power supply reference signal and the signal indicative of the load voltage level; and

digitally process the power supply error signal by, at least in part, digitally filtering the power supply error signal and sigma-delta modulating the digitally filtered power supply error signal, and generate the power supply control signal based, at least in part, on the digitally processed power supply error signal.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →