Memory device including OTP memory block and pseudo MTP memory block and memory access method
View Patent ↗Provided is a memory device in which the circuit structure is simplified while the functions of a memory including an OTP memory and a memory including a pseudo-MTP memory are maintained. A memory device includes a plurality of memory sets each including a mark bit storage area for storing a mark bit, which indicates that an object is deleted data, and a data bit storage area for storing data to be stored, the memory device being built from a one time programmable (OTP) memory including an OTP memory block and a pseudo-MTP memory block, the OTP memory block containing a given number of memory sets selected out of the plurality of memory sets to operate as an OTP memory, the pseudo-MTP memory block containing the rest of the plurality of memory sets which remains after the memory sets of the OTP memory block are excluded and operates as a pseudo-MTP memory. The mark bit is written in advance in the mark bit storage area of the OTP memory block.
1. A memory device comprising a plurality of memory sets each including a mark bit storage area for storing a mark bit and a data bit storage area, the memory device comprising a one time programmable (OTP) memory including at least one OTP memory block and at least one pseudo-multi time programmable (MTP) memory block, the at least one OTP memory block including a number of memory sets of the plurality of memory sets that operate as an OTP memory, the at least one pseudo-MTP memory block including the plurality of memory sets that remain after the memory sets of the at least one OTP memory block are excluded and operates as a pseudo-MTP memory, the memory device further comprising:
an address search unit that refers to the mark bit to obtain an identified address of one of the plurality of memory sets where data is to be read and written;
a reading unit that accesses the data bit storage area of the memory set indicated by the identified address to read stored data in the data bit storage area of the indicated memory set;
a writing unit that uses the identified address to identify a memory set in the at least one pseudo-MTP memory block where new data is to be written, and writes the new data in the data bit storage area of the identified memory set; and
a mark bit writing unit that writes the mark bit in the mark bit storage area of the memory set indicated by the identified address,
wherein the mark bit and new data are written in advance in the mark bit storage area of the at least one OTP memory block before the at least one pseudo-MTP memory block is accessed.
2. A memory device according to claim 1 ,
wherein the plurality of memory sets are structured to allow reading and writing of a plurality of systems of data, and
wherein, the address search unit identifies an address of the memory set to be accessed in the (MTP) memory block based on a system selection signal.
3. A memory device according to claim 1 ,
wherein the reading unit reads stored date from the OTP memory block, using an address contained in an instruction to read the stored data.
4. A memory access method for a memory device, the method comprising:
providing a memory device including a plurality of memory sets each including a mark bit storage area for storing a mark bit, and a data bit storage area, the memory device further comprising a one time programmable (OTP) memory including at least one OTP memory block and at least one pseudo-multi time programmable (MTP) memory block, the at least one OTP memory block including a number of memory sets selected out of the plurality of memory sets to operate as an OTP memory, the at least one pseudo-MTP memory block including the plurality of memory sets that remain after the memory sets of the at least one OTP memory block are excluded and operates as a pseudo-MTP memory, the memory device writing the mark bit in advance in the mark bit storage area of the at least one OTP memory block;
searching for an address by referring to the mark bit to obtain an identified address of one of the plurality of memory sets where data is to be read and written;
reading stored data by accessing the data bit storage area of the memory set that is indicated by the identified address;
writing new data by using the identified address to identify a memory set in the at least one pseudo-MTP memory block where the new data is to be newly written, and writing the new data in the data bit storage area of the identified memory set; and
writing the mark bit in the mark bit storage area of the memory set that is indicated by the identified address.
5. A memory access method according to claim 4 ,
wherein the plurality of memory sets are structured to allow reading and writing of a plurality of systems of data, and
wherein if a system of data which includes a memory set to be accessed constitutes the (MTP) memory block, searching for the address comprises identifying an address of the memory set to be accessed by the (MTP) memory block.
6. A memory access method according to claim 4 ,
wherein the reading is performed so as to read stored data from the OTP memory block using an address contained in an instruction to read the stored data.