IP Library Granted Patent US 8,149,232
Granted Patent B2
US 8,149,232 · App. 12/687,894 · Granted Apr 3, 2012

Systems and methods for generating reference voltages

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,149,232
App. No.
12/687,894
Granted
Apr 3, 2012
Kind
B2
Abstract

Systems and methods for generating reference voltages are provided. A representative system comprises a resistor circuit; a first switch coupled between a first end of the resistor circuit and a first power source; a second switch coupled between the first end of the resistor circuit and a second power source; a third switch coupled to a second end of the resistor circuit; a fourth switch coupled to the second end of the resistor circuit; a first resistor coupled between the first end of the resistor circuit and the first switch; a second resistor coupled between the first end of the resistor circuit and the second switch; a third resistor coupled between the second end of the resistor circuit and the third switch; a fourth resistor coupled between the second end of the resistor circuit and the fourth switch; and a control circuit for controlling the switches.

Claims (9)

1. A method for generating reference voltages comprising:

providing a resistor circuit comprising a plurality of resistors coupled in series;

coupling a first end of the resistor circuit to a first power source by applying a first control signal and coupling a second end of the resistor circuit to the first power source by applying a second control signal when displaying an image with reduced power; and

coupling the first end of the resistor circuit to the first power source by applying the first control signal and coupling the second end of the resistor circuit to a second power source by applying the second control signal when displaying an image with full gradation.

2. The method of claim 1 wherein coupling first and second ends comprises coupling the first and second ends of the resistor circuit to a negative voltage source when displaying an image with reduced power.

3. The method of claim 1 wherein coupling the first end comprises coupling the first end of the resistor circuit to a positive voltage source and the second end of the resistor circuit to a negative voltage when displaying an image with full gradation.

4. The method of claim 1 wherein coupling the first end comprises coupling the first end of the resistor circuit to the first power source through a first resistor and the second end of the resistor circuit to the second power source through a second resistor when displaying an image with full gradation for compensating for a charge-injection effect.

5. The method of claim 4 wherein coupling the first end comprises coupling the first end of the resistor circuit to a positive voltage source through the first resistor and the second end of the resistor circuit to a negative voltage through the second resistor when displaying an image with full gradation.

6. The method of claim 1 further comprising providing a voltage established between two adjacent resistors of the resistor circuit to a digital-to-analog controller.

Assignments (2)
CHANGE OF NAME Recorded Apr 7, 2014
From: CHIMEI INNOLUX CORPORATION
To: INNOLUX CORPORATION
Reel/Frame 032621/0718 →
MERGER Recorded Jan 23, 2011
From: TPO DISPLAYS CORP.
To: CHIMEI INNOLUX CORPORATION
Reel/Frame 025681/0351 →