Programmable gain attenuator with a wide attenuation range and a fine attenuation step size
View Patent ↗A programmable gain attenuator (PGA) configured to receive a signal at an input and provide an attenuated version of the signal at an output is provided herein. The PGA includes a resistor coupled between a first tap and a second tap, where the first tap is coupled to the input of the PGA. The PGA further includes two sets of switches. The first set of switches is coupled in parallel between the first tap and the output, and the second set of switches is coupled in parallel between the second tap and the output. The attenuation setting of the programmable gain attenuator can be determined by controlling each set of switches.
1. A programmable gain attenuator (PGA) configured to receive a signal at an input and provide an attenuated version of the signal at an output, comprising:
a resistor coupled between a first tap and a second tap, wherein the first tap is coupled to the input;
a first set of switches coupled in parallel between the first tap and the output;
a second set of switches coupled in parallel between the second tap and the output; and
a controller configured to control the first set of switches and the second set of switches such that for a switch turned off in the first set of switches a corresponding switch is turned on in the second set of switches,
wherein the impedance of each switch in the first set of switches corresponds to an impedance value in a non-uniform impedance profile.
2. The PGA of claim 1 , wherein a switching order of the first set of switches is determined based on the impedance of each switch in the first set of switches.
3. The PGA of claim 1 , wherein the impedance of each switch in the first set of switches is defined by a width and a length of a channel associated with the switch.
4. The PGA of claim 1 , wherein a first set of impedance values in the impedance profile follow a substantially decreasing impedance trend and correspond to a first subset of the switches in the first set of switches.
5. The PGA of claim 4 , wherein a second set of impedance values in the impedance profile follow a substantially increasing impedance trend and correspond to a second subset of the switches in the first set of switches.
6. The PGA of claim 1 , wherein a gate terminal of a first switch in the first set of switches is coupled to a first digital-to-analog converter (DAC) output signal, and a gate terminal of a second switch in the second set of switches is coupled to a second DAC output signal.
7. The PGA of claim 6 , wherein a voltage magnitude of the first DAC output signal and a voltage magnitude of the second DAC output signal are configured to vary in opposite directions.
8. The PGA of claim 7 , wherein an attenuation setting of the PGA is determined, at least in part, based on the voltage magnitude of the first DAC output and the voltage magnitude of the second DAC output.
9. A method for adjusting a gain of a programmable gain attenuator (PGA) configured to receive a signal at an input and provide an attenuated version of the signal at an output, the PGA having a resistor coupled between a first tap and a second tap, a first set of switches coupled in parallel between the first tap and the output, and a second set of switches coupled in parallel between the second tap and the output, the first tap being further coupled to the input, the method comprising:
receiving a signal to increment an attenuation setting of the PGA by a single attenuation step;
in response to receiving the signal, turning off a first switch in the first set of switches and turning on a corresponding second switch in the second set of switches; and
selectins; the first switch to turn off, in response to receiving, the signal, on a switching order, wherein the switching older is determined based on respective impedances of the switches in the first set, of switches.
10. The method of claim 9 , wherein turning off the first switch in the first set of switches and turning on the corresponding second switch in the second set of switches further comprises:
incrementally turning off the first switch by incrementally decreasing a voltage applied to a gate terminal of the first switch; and
incrementally turning on the second switch by incrementally increasing a voltage applied to a gate terminal of the second switch.
11. The method of claim 9 , wherein the first set of switches have a non-uniform impedance profile.
12. The method of claim 11 , wherein a first set of impedance values in the impedance profile follow a substantially decreasing impedance trend and correspond to a first subset of the switches in the first set of switches.
13. The PGA of claim 12 , wherein a second set of impedance values in the impedance profile follow a substantially increasing impedance trend and correspond to a second subset of the switches in the first set of switches.