Semiconductor device manufacturing method and design support apparatus

1. A semiconductor device manufacturing method, comprising:

forming a conductive film over a substrate;

forming an assist pattern on the conductive film;

forming a metal film to cover the conductive film and the assist pattern;

etching back the metal film to form at least one side wall film which is the metal film on a side surface of the assist pattern;

removing the assist pattern after the forming the side wall film;

forming at least one resist pattern to selectively expose a portion of the conductive film and a portion of the side wall film, after the removing the assist pattern;

performing etching using the resist pattern as a mask to remove the exposed portion of the side wall film; and

etching the conductive film using the side wall film as a mask to form a gate electrode and a contact region electrically connected to the gate electrode,

wherein a shape of the side wall film left on the conductive film by removing a portion exposed from the resist pattern corresponds to a shape of the gate electrode and a shape of the contact region, and

wherein a shape of the assist pattern is in contact with at least three sides of the side wall film corresponding to the shape of the contact region.

2. The semiconductor device manufacturing method according to claim 1 , wherein the forming the assist pattern on the conductive film comprises forming a plurality of the assist patterns on the conductive film so that a distance between adjacent two of the assist patterns is a distance equal to or smaller than two times of a width of the side wall film in a lateral direction, to thereby couple a side wall film formed on a side surface of one of the adjacent two assist patterns to a side wall film formed on a side surface of another of the adjacent two assist patterns.

3. A design support apparatus, comprising:

a layout unit to create layout data of a semiconductor device, which contains shape data of gate electrodes and shape data of contact regions electrically connected to the gate electrodes;

an extraction unit to extract, from the layout data, the shape data of the gate electrodes and the shape data of the contact regions;

a first pattern creation unit to create shape data of an assist pattern which is sandwiched by at least two of the gate electrodes and at least two of the contact regions and is in contact with at least three sides of one of the at least two of the contact regions;

a second pattern creation unit to provide a hard mask pattern around the assist pattern, to thereby create shape data of the hard mask pattern;

a third pattern creation unit to remove shapes of the gate electrodes and shapes of the contact regions from a shape of the hard mask pattern, to thereby create partial shape data of the hard mask pattern; and

a mask data creation unit to create shape data of a cutting mask in which a pattern including at least a partial shape of the hard mask pattern is formed.

4. A recording medium having a program recorded thereon, the program causing a design support apparatus to:

create layout data of a semiconductor device, which contains shape data of gate electrodes and shape data of contact regions electrically connected to the gate electrodes;

extract, from the layout data, the shape data of the gate electrodes and the shape data of the contact regions;

create shape data of an assist pattern which is sandwiched by at least two of the gate electrodes and at least two of the contact regions and is in contact with at least three sides of one of the at least two of the contact regions;

provide a hard mask pattern around the assist pattern, to thereby create shape data of the hard mask pattern;

remove shapes of the gate electrodes and shapes of the contact regions from a shape of the hard mask pattern, to thereby create partial shape data of the hard mask pattern; and

create shape data of a cutting mask in which a pattern including at least a partial shape of the hard mask pattern is formed.