IP Library Granted Patent US 7,835,431
Granted Patent B2
US 7,835,431 · App. 12/694,128 · Granted Nov 16, 2010

Systems and methods for loop length and bridged tap length determination of a transmission line

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Quick Facts
Patent No.
US 7,835,431
App. No.
12/694,128
Granted
Nov 16, 2010
Kind
B2
Abstract

Through the use of a least squares minimization concept, the loop length, the number of bridged taps and length of the bridged taps on a transmission line can be determined from readily available modem data. In particular, the loop length, the number of bridge taps and the length of bridged taps can be estimated by comparing a measured frequency domain channel impulse response of the transmission line to a model of a loop that is comprised of multiple sections and multiple bridge taps.

Claims (32)

1. A method to estimate a loop length of a transmission line comprising:

estimating a first channel transfer function using one or more downstream signals from an initialization;

estimating a second channel transfer function using one or more upstream signals from the initialization, the initialization occurring between a first broadband multicarrier modem on a first end of the transmission line and a second broadband multicarrier modem on a second end of the transmission line, the one or more downstream signals from the initialization having been transmitted or received using a first multiplicity of discrete frequency carriers and the one or more upstream signals from the initialization having been transmitted or received using a second multiplicity of discrete frequency carriers;

determining a first theoretical channel transfer function;

determining a second theoretical channel transfer function;

comparing the first theoretical channel transfer function and the first estimated channel transfer function;

comparing the second theoretical channel transfer function and the second estimated channel transfer function;

determining a first estimated loop length of the transmission line based upon said comparison of the first theoretical channel transfer function and the first estimated channel transfer function; and

determining a second estimated loop length of the transmission line based upon said comparison of the second theoretical channel transfer function and the second estimated channel transfer function.

2. The method of claim 1 , wherein the estimating of one or more of the first and second channel transfer functions uses a REVERB signal.

3. The method of claim 1 , further comprising estimating a bridged tap length.

4. The method of claim 1 , further comprising outputting one or more of the estimated loop lengths.

5. The method of claim 1 , wherein one or more of the first and second estimated channel transfer functions include multiple sections with varying gauges.

6. The method of claim 1 , wherein one or more of the first and second theoretical channel transfer functions include multiple sections with varying gauges.

7. The method of claim 1 , wherein the method is performed on at least one of a single program general purpose computer, a program general purpose computer, a special purpose computer, a programmed microprocessor, a microcontroller and peripheral integrated circuit element, an ASIC or other integrated circuit, a digital signal processor, a hard wired electronic or logic circuit, a discrete element circuit, a programmable logic device, a PLD, a PLA, an FPGA, a PAL, and a modem.

8. A loop length estimation system comprising:

a controller; and

a loop length output device capable of:

estimating a first channel transfer function using one or more downstream signals from an initialization;

estimating a second channel transfer function using one or more upstream signals from the initialization, the initialization occurring between a first broadband multicarrier modem on a first end of a transmission line and a second broadband multicarrier modem on a second end of the transmission line, the one or more downstream signals from the initialization having been transmitted or received using a first multiplicity of discrete frequency carriers and the one or more upstream signals from the initialization having been transmitted or received using a second multiplicity of discrete frequency carriers;

determining a first theoretical channel transfer function;

determining a second theoretical channel transfer function;

comparing the first theoretical channel transfer function and the first estimated channel transfer function;

comparing the second theoretical channel transfer function and the second estimated channel transfer function;

determining a first estimated loop length of the transmission line based upon said comparison of the first theoretical channel transfer function and the first estimated channel transfer function; and

determining a second estimated loop length of the transmission line based upon said comparison of the second theoretical channel transfer function and the second estimated channel transfer function.

9. The system of claim 8 , wherein the estimating of one or more of the first and second channel transfer functions uses a REVERB signal.

10. The system of claim 8 , wherein the loop length output device is further capable of estimating a bridged tap length.

11. The system of claim 8 , wherein the loop length output device is further capable of outputting one or more of the estimated loop lengths.

12. The system of claim 8 , wherein one or more of the first and second estimated channel transfer functions include multiple sections with varying gauges.

13. The system of claim 8 , wherein one or more of the first and second theoretical channel transfer functions include multiple sections with varying gauges.

14. The system of claim 8 , wherein the loop length estimation system is implemented on at least one of a single program general purpose computer, a program general purpose computer, a special purpose computer, a programmed microprocessor, a microcontroller and peripheral integrated circuit element, an ASIC or other integrated circuit, a digital signal processor, a hard wired electronic or logic circuit, a discrete element circuit, a programmable logic device, a PLD, a PLA, an FPGA, a PAL, and a modem.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2014
From: AWARE, INC.
To: BROADCOM CORPORATION
Reel/Frame 033705/0585 →