Circuit states
View Patent ↗Systems and methods for deriving a net equation representing a net state of an analog circuit net, wherein the net equation is derived from at least one other net state, determining a truthfulness of the net equation, reporting the truthfulness.
1. A method comprising:
using a computer to derive a net equation representing a net state of a gate of an electronic circuit net, wherein the net equation is derived from at least one other net state; determining a truthfulness of the net equation; and
reporting the truthfulness.
2. The method of claim 1 , wherein the net state is selected from a group consisting of float, high, and low; and said reporting the truthfulness comprises reporting said net state of said gate.
3. The method of claim 1 , wherein the net equation is a hypothesis of the net state.
4. The method of claim 1 , further comprising substituting a term of the net equation, wherein the substitution is determined based on at least one additional net state.
5. The method of claim 4 , wherein the substitution is determined based on a predetermined device configuration.
6. The method of claim 1 , based on the truthfulness, further comprising determining a failure point of said gate of said electronic circuit net.
7. The method of claim 6 , wherein the failure point is determined with one evaluation of the net equation.
8. The method of claim 6 , wherein the failure point is determined with a logical certainty.
9. The method of claim 1 , based on the truthfulness, further comprising determining all failure points of said gate of said electronic circuit net.
10. The method of claim 1 , wherein the net equation is time domain independent.
11. The method of claim 1 , wherein a failure point is determined with only a user input of power rail definitions.
12. The method of claim 1 , further comprising predicting a certain net state will not Occur.
13. The method of claim 1 , further comprising determining suspect failure points prior to the determining the truthfulness of the net equation.
14. A method comprising:
using a computer to derive a net equation representing a net state of a gate of an electronic circuit net, wherein the net equation is derived from at least one other net state, wherein the net equation is a hypothesis of the net state; determining a truthfulness of the net equation; and
reporting the truthfulness.
15. The method of claim 14 , wherein the net state is selected from a group consisting of float, high, and low; and said reporting the truthfulness comprises reporting said net state of said gate.
16. The method of claim 14 , further comprising substituting a term of the net equation, wherein a substitution is determined based on at least one additional net state.
17. The method of claim 16 , wherein the substitution is determined based on a predetermined device configuration.
18. The method of claim 14 , based on the truthfulness, further comprising determining a failure point of said gate of said electronic circuit net, wherein the failure point is determined with a logical certainty.
19. A non-transitory computer readable medium having embodied thereon a program, the program being executable by a computing device for performing a method for net state float, high, or low determination of a gate of an electronic circuit net, said method comprising: deriving a net equation representing a net state of said gate of said electronic circuit net, wherein the net equation is derived from at least one other net state; determining a truthfulness of the net equation; and reporting the truthfulness; wherein said reporting the truthfulness comprises reporting said net state of said gate.
20. The method of claim 19 , based on the truthfulness, the method further comprising determining a failure point of said electronic circuit net, wherein the failure point is determined with a logical certainty.