IP Library Granted Patent US 8,089,122
Granted Patent B2
US 8,089,122 · App. 12/694,897 · Granted Jan 3, 2012

Vertical trench gate transistor semiconductor device and method for fabricating the same

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Quick Facts
Patent No.
US 8,089,122
App. No.
12/694,897
Granted
Jan 3, 2012
Kind
B2
Abstract

A first region functioning as a transistor includes a drain region, a body region formed over the drain region, a source region formed over the body region and a trench formed through the body region and having a gate electrode buried therein. A source region is formed over the body region extending in a second region. The source region forming an upper edge of the trench is rounded.

Claims (52)

1. A vertical trench gate transistor semiconductor device comprising:

a drain region;

a first body region formed over the drain region;

a second body region formed over a part of the first body region;

a source region formed over another part of the first body region;

a trench formed through the source region, the first body region, and the second body region; and

a gate disposed in the trench;

wherein the second body region is electrically connected to the first body region, and

an upper edge of a wall face of the trench is rounded.

2. The vertical trench gate transistor semiconductor device of claim 1 ,

wherein the source region is exposed at the upper edge of the wall face of the trench, and the source region which is exposed at the upper edge of the wall face of the trench is rounded.

3. The vertical trench gate transistor semiconductor device of claim 1 ,

wherein parts of the wall face of the trench from the upper edge to an upper face of the source region is rounded entirely.

4. The vertical trench gate transistor semiconductor device of claim 1 ,

wherein an impurity concentration of an upper part of the second body region is higher than an impurity concentration of a lower part of the second body region.

5. The vertical trench gate transistor semiconductor device of claim 1 ,

wherein a gate region is formed so as to form a recessed part in an upper part of the trench, and

the second body region is exposed at a wall face of the recessed part.

6. The vertical trench gate transistor semiconductor device of claim 1 ,

wherein a gate region is formed so as to form a recessed part in an upper part of the trench, and

the source region is exposed at the wall face of the recessed part and is in contact through the respective exposed parts and upper faces of the source region.

7. The vertical trench gate transistor semiconductor device of claim 5 ,

wherein the second body region includes, in an upper portion thereof, a heavily doped region of which impurity concentration is relatively high, and

the heavily doped region is exposed at the wall face of the recessed part and is in electrical contact through the exposed part.

8. The vertical trench gate transistor semiconductor device of claim 5 ,

wherein the second body region is exposed at the wall face of the recessed part and is in electrical contact through the exposed part.

9. A vertical trench gate transistor semiconductor device comprising:

a drain region;

a first body region formed over the drain region;

a second body region formed over a part of the first body region;

a source region formed over another part of the first body region;

a trench formed through the source region and the first body region; and

a gate disposed in the trench;

wherein the second body region is electrically connected to the first body region,

an upper edge of a wall face of the trench is rounded,

a gate region is formed so as to form a recessed part in an upper part of the trench, and

the second body region is exposed at a wall face of the recessed part and is in electrical contact through the exposed part.

10. The vertical trench gate transistor semiconductor device of claim 9 ,

wherein the source region is exposed at the upper edge of the wall face of the trench, and the source region which is exposed at the upper edge of the wall face of the trench is rounded.

11. The vertical trench gate transistor semiconductor device of claim 9 ,

wherein parts of the wall face of the trench from the upper edge to an upper face of the source region is rounded entirely.

12. The vertical trench gate transistor semiconductor device of claim 11 , further comprising:

an additional electrode overlaid from the source region to the gate region with an insulating film interposed,

wherein the additional electrode is in contact with the second body region at the wall face of the recessed part.

13. The vertical trench gate transistor semiconductor device of claim 12 ,

wherein the additional electrode is electrically connected to the source region.

14. The vertical trench gate transistor semiconductor device of claim 9 ,

wherein the second body region includes a lower portion and an upper portion whose impurity concentration is higher than an impurity concentration of the lower portion, and

the upper portion is exposed at the wall face of the recessed part and is in electrical contact through the exposed part.

15. The vertical trench gate transistor semiconductor device of claim 14 ,

wherein an additional electrode is formed over the gate in the recessed part with an insulating layer interposed, and

the additional electrode is in contact with the upper portion at the wall face of the recessed part.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →