Analog/digital converter

1. An A/D converter comprising:

a plurality of comparators that performs sampling of a plurality of reference voltages and analog input signals during a sampling time, and compares each of the plurality of reference voltages with the analog signals during a comparison time, wherein

the A/D converter detects bubbles in thermometer codes obtained from output signals of the plurality of comparators and adjusts a ratio of the sampling time and the comparison time of the plurality of comparators so as to reduce the bubbles.

2. The A/D converter according to claim 1 , comprising

a control signal generation circuit that generates a comparator control signal defining the sampling time and the comparison time of the plurality of comparators, wherein

the A/D converter supplies the comparator control signal to the plurality of comparators.

3. The A/D converter according to claim 2 , wherein

the control signal generation circuit counts the number of bubbles generated in a first cycle period of the comparator control signal, and adjusts the comparator control signal so as to reduce a count value of the bubbles.

4. The A/D converter according to claim 1 , further comprising

a reference voltage generation circuit that generates the plurality of reference voltages.

5. The A/D converter according to claim 1 , further comprising

an encoder that outputs a first bit digital signal by encoding the thermometer codes.

6. The A/D converter according to claim 5 , wherein

the encoder detects a bubble in the thermometer code and supplies the first bit digital signal to the control signal generation circuit.

7. An A/D converter comprising:

a reference voltage generation circuit that generates a plurality of reference voltages;

a plurality of comparators that performs sampling of each of the reference voltages and analog input signals and compares the reference voltages with analog input signals;

a control signal generation circuit that generates a comparator control signal for controlling the plurality of comparators based on a reference clock;

an encoder that encodes thermometer codes obtained from the output signal of the plurality of comparators and outputs digital signals with given bits, wherein the encoder includes a bubble detection circuit that detects a bubble in the thermometer code and outputs a bubble detection signal;

wherein, the control signal generation circuit includes a duty adjustment circuit that receives the bubble detection signal and adjusts a duty ratio of the comparator control signal.

8. The A/D converter according to claim 7 , wherein the duty adjustment circuit adjusts a ratio of a sampling time and a comparison time in one cycle of the comparator control signal.

9. The A/D converter according to claim 8 , wherein the duty adjustment circuit adjusts the ratio of the sampling time and the comparison time in one cycle, and sets a timing that is substantially the same as a sample edge that switches from the sampling time to the comparison time.

10. The A/D converter according to claim 7 , wherein the duty adjustment circuit counts the number of the bubble detection signals generated in one cycle period of the reference clock and adjusts the duty ratio of the comparator control signal so as to reduce a count value of the bubbles.

11. The A/D converter according to claim 7 , wherein the adjustment of the duty ratio of the comparator control signal by the duty adjustment circuit is performed as a calibration of the A/D converter before starting operation.

12. The A/D converter according to claim 7 , wherein the adjustment of the duty ratio of the comparator control signal by the duty adjustment circuit is performed in the background during operation of the A/D converter.