IP Library Granted Patent US 8,223,312
Granted Patent B2
US 8,223,312 · App. 12/701,766 · Granted Jul 17, 2012

Method of manufacturing a display device using a barrier layer to form an ohmic contact layer

Assignee: Beijing BOE Optoelectronics Technology Co., Ltd.
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Quick Facts
Patent No.
US 8,223,312
App. No.
12/701,766
Granted
Jul 17, 2012
Kind
B2
Abstract

An embodiment of the invention provides a thin film transistor liquid crystal display (TFT-LCD) array substrate comprising: a gate line and a data line that intersect with each other to define a pixel region; and a pixel electrode and a thin film transistor formed in the pixel region. The thin film transistor comprises: a gate electrode connected with the gate line; a semiconductor island positioned above the gate electrode; and a source electrode and a drain electrode that are formed on the semiconductor island. A surface of the semiconductor island contacting with the source electrode and the drain electrode comprises ohmic contact regions subject to a surface treatment and a region of the semiconductor layer between the source electrode and the drain electrode is covered with a barrier layer. Another embodiment of the invention provides a method of manufacturing a thin film transistor liquid crystal display (TFT-LCD) array substrate.

Claims (19)

1. A method of manufacturing a thin film transistor liquid crystal display (TFT-LCD) array substrate comprising:

step 1 of depositing a gate metal thin film on a base substrate and forming patterns for a gate line and a gate electrode by a first patterning process;

step 2 of sequentially depositing a gate insulating layer, a semiconductor layer and a barrier layer on the resultant substrate after step 1 and then forming a semiconductor pattern and a barrier layer pattern by a second patterning process, wherein the barrier layer pattern is positioned above the semiconductor pattern and a region of the semiconductor pattern other than that covered by the barrier layer pattern is treated to form ohmic contact regions, step 2 further including:

step 2-1 of coating a photoresist film on the barrier layer after the gate insulating layer, the semiconductor layer and the barrier layer are sequentially deposited on the resultant substrate after step 1;

step 2-2 of exposing the photoresist film by using a half-tone mask or a gray-tone mask to convert the photoresist film into a photoresist removed region, a photoresist completely remaining region and a photoresist half-remaining region, wherein the photoresist completely remaining region corresponds to a region where the barrier layer pattern to be formed is positioned, the photoresist half-remaining region corresponds to a region where the semiconductor pattern to be formed is positioned, and the photoresist removed region corresponds to a region without the barrier layer pattern and the semiconductor pattern; after a developing process, a thickness of the photoresist film in the photoresist complete remaining region is not changed, the photoresist film in the photoresist removed region is removed, and a thickness of the photoresist film in the photoresist half-remaining region becomes thinner;

step 2-3 of removing the barrier layer and the semiconductor layer in the photoresist removed region by a first etching process, so that the gate insulating layer in the photoresist removed region is exposed and the semiconductor pattern is formed;

step 2-4 of removing the photoresist film in the photoresist half-remaining region by an ashing process, so that the barrier layer in the photoresist half-remaining region is exposed;

step 2-5 of removing the barrier layer in the photoresist half-remaining region by a second etching process, so that the semiconductor layer is exposed and the barrier layer pattern is formed;

step 2-6 of treating the region of the semiconductor pattern other than that covered by the barrier layer pattern to convert the exposed surface of the semiconductor layer into ohmic contact regions; and

step 2-7 of stripping of the remaining photoresist film; and

step 3 of sequentially depositing a transparent conductive thin film and a source and drain metal thin film on the resultant substrate after step 2 and then forming patterns for a data line, a source electrode, a drain electrode, a thin film transistor (TFT) channel region and a pixel electrode by a third patterning process, wherein the source electrode and the drain electrode are respectively connected with ohmic contact regions of the semiconductor layer via the transparent conductive thin film remaining thereunder, the barrier layer covers the semiconductor layer in the TFT channel region, and the pixel electrode is directly connected with the drain electrode.

2. The method of claim 1 , wherein the surface treatment is a phosphorizing treatment by using PH 3 gas, and is performed at a RF power of 5 kW˜12 kW, a pressure of 100 mT˜400 mT and a gas flux of 1000˜4000 sccm.

3. The method of claim 1 , wherein the step 3 comprises:

step 3-1 of coating a photoresist film on the source and drain metal thin film, after the transparent conductive thin film and the source and drain metal thin film are sequentially deposited on the resultant substrate after step 2;

Step 3-2 of exposing the photoresist film by using a half-tone mask or a gray-tone mask to convert the photoresist into a photoresist removed region, a photoresist completely remaining region and a photoresist half-remaining region, wherein the photoresist completely remaining region corresponds to a region where the patterns for the data line, the source electrode and the drain electrode are positioned, the photoresist half-remaining region corresponds to a region where the pixel electrode pattern to be formed is positioned, and the photoresist removed region corresponds to a region without the patterns; after a developing process, a thickness of the photoresist film in the photoresist completely remaining region is not changed, the photoresist film in the photoresist removed region is removed and a thickness of the photoresist film in the photoresist half-remaining region becomes thinner;

Step 3-3 of removing the transparent conductive thin film and the source and drain metal thin film in the photoresist removed region by a first etching process, so that the data line, the source electrode and the drain electrode and the TFT channel region pattern are formed;

step 3-4 of removing the photoresist film in the photoresist half-remaining region, so that the source and drain metal thin film in this region is exposed;

step 3-5 of removing the source and drain metal thin film in the photoresist half-remaining region by a second etching process, so that the pixel electrode pattern is formed;

step 3-6 of stripping off the remaining photoresist film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2015
From: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD
To: BOE TECHNOLOGY GROUP CO., LTD.; BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO. LTD
Reel/Frame 036644/0601 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2010
From: LIU, XIANG
To: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 023910/0446 →
Priority Claims (1)
CN 2009 1 0077487 · Feb 13, 2009 · national
Continuity (1)
Related Publication 20100208156A1 · Aug 19, 2010