IP Library Granted Patent US 8,629,385
Granted Patent B2
US 8,629,385 · App. 12/705,161 · Granted Jan 14, 2014

Solid-state imaging element and driving method of the solid-state imaging element

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Quick Facts
Patent No.
US 8,629,385
App. No.
12/705,161
Granted
Jan 14, 2014
Kind
B2
Abstract

Disclosed herein is a solid-state imaging element including: (A) a light reception/charge storage region formed in a semiconductor layer, the light reception/charge storage region including M light reception/charge storage layers stacked one on top of the other, where M≧2; (B) a charge output region formed in the semiconductor layer; (C) a conduction/non-conduction control region which includes a portion of the semiconductor layer located between the light reception/charge storage region and the charge output region; and (D) a conduction/non-conduction control electrode adapted to control the conduction or non-conduction state of the conduction/non-conduction control region, wherein mth potential control electrodes are provided between the mth and (m+1)th light reception/charge storage layers, where 1≦m≦(M−1), to control the potentials of the light reception/charge storage layers.

Claims (55)

1. A solid-state imaging element comprising:

(A) a light reception/charge storage region in a semiconductor layer, the light reception/charge storage region including (i) M light reception/charge storage layers stacked one on top of the other, where M≧2, and (ii) m potential control electrodes to control the potentials of the light reception/charge storage layers, where 1≦m≦(M−I);

(B) a charge output region in the semiconductor layer;

(C) a conduction/non-conduction control region which includes a portion of the semiconductor layer located between the light reception/charge storage region and the charge output region;

(D) a conduction/non-conduction control electrode adapted to control the conduction or non-conduction state of the conduction/non-conduction control region;

(E) an insulating film between the conduction/non-conduction control region and the conduction/non-conduction control electrode; and

(F) a coating layer between the insulating film and a surface of one of the M light reception/charge storage layers, the coating layer being connected to the conduction/nonconduction control region, the coating layer including a semiconductor material containing an impurity different in conductivity type from at least one of light reception/charge storage layers,

wherein,

mth potential control electrodes are provided between the mth and (m+1)th light reception/charge storage layer to control the potentials of the light reception/charge storage layers, mth being an ordinal number.

2. The solid-state imaging element of claim 1 , wherein:

a first control voltage is applied to the first to (m−1)th potential control electrodes, and

a second control voltage to the mth to (M−1)th potential control electrodes at the same time so as to potentially isolate the first to mth light reception/charge storage layers from the (m+1)th to Mth light reception/charge storage layers.

3. The solid-state imaging element of claim 1 , wherein:

the potential control electrodes and conduction/non-conduction control region have a first conductivity type, and

the charge output region, light reception/charge storage layers and intermediate layers sandwiched between the mth and (m+1)th light reception/charge storage layers have a second conductivity type.

4. The solid-state imaging element of claim 3 , wherein the intermediate layers are at least partially surrounded by the potential control electrodes.

5. The solid-state imaging element of claim 1 , wherein an uppermost light reception/charge storage layer is covered with the coating layer, the coating layer comprising a semiconductor material containing an impurity different in conductivity type from the uppermost light reception/charge storage layer.

6. The solid-state imaging element of claim 1 , wherein a potential barrier region is formed in the region of the semiconductor layer between the light reception/charge storage layers and conduction/non-conduction control region, the potential barrier region containing an impurity of the same conductivity type as for the light reception/charge storage layers.

7. The solid-state imaging element of claim 6 , wherein:

the potential control electrodes and conduction/non-conduction control region have a first conductivity type,

the charge output region, light reception/charge storage layers and intermediate layers sandwiched between the mth and (m+1)th light reception/charge storage layers have a second conductivity type, and

the intermediate layers are at least partially surrounded by the potential control electrodes.

8. The solid-state imaging element of claim 6 , wherein:

the potential control electrodes and conduction/non-conduction control region have a first conductivity type,

the charge output region and light reception/charge storage layers have a second conductivity type, and

the potential control electrodes are sandwiched between the mth and (m+1)th light reception/charge storage layers.

9. The solid-state imaging element of claim 1 , wherein an element isolation region is formed on the surface of the semiconductor layer, the element isolation layer comprising a semiconductor material containing an impurity different in conductivity type from the light reception/charge storage layers.

10. The solid-state imaging element of claim 1 , wherein the light reception/charge storage layers are completely depleted before the charge is stored.

11. A driving method of a solid-state imaging element, the solidstate imaging element including

(A) a light reception/charge storage region in a semiconductor layer, the light reception/charge storage region including (i) M light reception/charge storage layers stacked one on top of the other, where M≧2, and (ii) m potential control electrodes to control the potentials of the light reception/charge storage layers, where 1≦m≦(M−1);

(B) a charge output region in the semiconductor layer;

(C) a conduction/non-conduction control region which includes a portion of the semiconductor layer located between the light reception/charge storage region and the charge output region;

(D) a conduction/non-conduction control electrode adapted to control the conduction or non-conduction state of the conduction/non-conduction control region;

(E) an insulating film between the conduction/non-conduction control region and the conduction/non-conduction control electrode; and

(F) a coating layer between the insulating film and a surface of one of the M light reception/charge storage layers, the coating layer being connected to the conduction/nonconduction control region, the coating layer including a semiconductor material containing an impurity different in conductivity type from at least one of light reception/charge storage layers, wherein mth potential control electrodes are provided between the mth and (m+1)th light reception/charge storage layers to control the potentials of the light reception/charge storage layers, mth being an ordinal number, the driving method comprising the steps of:

applying a predetermined voltage to the conduction/non-conduction control electrode to bring the conduction/non-conduction control region into conduction;

applying a first control voltage to the first to (m−1)th potential control electrodes and a second control voltage to the mth to (M−1)th potential control electrodes at the same time to potentially isolate the first to mth light reception/charge storage layers from the (m+1)th to Mth light reception/charge storage layers; and

transferring the charge stored in the first to mth light reception/charge storage layers to the charge output region via the conduction/non-conduction control region which has been brought into conduction.

12. The driving method of a solid-state imaging element of claim 11 , wherein:

in the solid-state imaging element, the potential control electrodes and conduction/nonconduction control region have a first conductivity type, and

the charge output region, light reception/charge storage layers and intermediate layers sandwiched between the mth and (m+1)th light reception/charge storage layers have a second conductivity type.

13. The driving method of a solid-state imaging element of claim 12 , wherein in the solid-state imaging element, the intermediate layers are at least partially surrounded by the potential control electrodes.

14. The driving method of a solid-state imaging element of claim 11 , wherein in the solid-state imaging element, an uppermost light reception/charge storage layer is covered with the coating layer, the coating layer comprising a semiconductor material containing an impurity different in conductivity type from the uppermost light reception/charge storage layer.

15. The driving method of a solid-state imaging element of claim 11 , wherein:

in the solid-state imaging element, a potential barrier region is formed in the region of the semiconductor layer between the light reception/charge storage layers and conduction/nonconduction control region, the potential barrier region containing an impurity of the same conductivity type as for the light reception/charge storage layers.

16. The driving method of a solid-state imaging element of claim 15 wherein:

in the solid-state imaging element, the potential control electrodes and conduction/nonconduction control region have a first conductivity type,

the charge output region, light reception/charge storage layers and intermediate layers sandwiched between the mth and (m+1)th light reception/charge storage layers have a second conductivity type, and

the intermediate layers are at least partially surrounded by the potential control electrodes.

17. The driving method of a solid-state imaging element of claim 15 wherein:

in the solid-state imaging element, the potential control electrodes and conduction/nonconduction control region have a first conductivity type,

the charge output region and light reception/charge storage layers have a second conductivity type, and

the potential control electrodes are sandwiched between the mth and (m+1)th light reception/charge storage layers.

18. The driving method of a solid-state imaging element of claim 11 , wherein in the solid-state imaging element, an element isolation region is formed on the surface of the semiconductor layer, the element isolation layer comprising a semiconductor material containing an impurity different in conductivity type from the light reception/charge storage layers.

19. The driving method of a solid-state imaging element of claim 11 , wherein in the solid-state imaging element, the light reception/charge storage layers are completely depleted before the charge is stored.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040419/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2010
From: TAKESHITA, KANEYOSHI; KUBODERA, TAKASHI; NAKAMURA, AKIHIRO
To: SONY CORPORATION
Reel/Frame 023933/0057 →