Nonvolatile memory element, nonvolatile memory apparatus, and method of manufacture thereof
View Patent ↗A lower electrode layer 2 , an upper electrode layer 4 formed above the lower electrode layer 2 , and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3 a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3 b arranged around the first region 3 a and having a larger content of oxygen than the first region 3 a , wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3 a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3 a.
1. A nonvolatile memory element, comprising:
a lower electrode layer;
an upper electrode layer formed above the lower electrode layer; and
a metal oxide thin film layer formed between the lower electrode layer and the upper electrode layer,
wherein the metal oxide thin film layer includes a first region whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer and the upper electrode layer and a second region arranged around the first region and having a larger content of oxygen than the first region; and
wherein
an outer peripheral surface of at least one of the lower electrode layer and the upper electrode layer is not flush (coplanar or aligned) with an outer peripheral surface of the second region.
2. The nonvolatile memory element as set forth in claim 1 , wherein the metal oxide thin film layer is formed of a transition metal oxide material.
3. The nonvolatile memory element as set forth in claim 1 , wherein the first and second regions are formed of an identical element.
4. The nonvolatile memory element as set forth in claim 1 , wherein the second region is formed such that the value of resistance of the second region is larger than the value of resistance of the first region in the case where the value of resistance of the first region increases by the application of an electric pulse between the lower electrode layer and the upper electrode layer.
5. The nonvolatile memory element as set forth in claim 1 , wherein the metal oxide thin film layer is formed of an iron oxide thin film and the first region is formed of triiron tetroxide (Fe 3 O 4 ).
6. The nonvolatile memory element as set forth in claim 1 , wherein the second region is formed of diiron trioxide (Fe 2 O 3 ).
7. The nonvolatile memory element according to claim 1 , wherein an outer shape of at least one of the upper electrode layer, the metal oxide thin film layer and the lower electrode layer is not identical to an outer shape of remaining layers.
8. The nonvolatile memory element according to claim 1 , wherein an outer shape of the upper electrode layer is larger in dimension than an outer shape of the metal oxide thin film layer.
9. The nonvolatile memory element according to claim 1 , wherein an outer shape of the lower electrode layer is larger in dimension than an outer shape of the metal oxide thin film layer.
10. A method of manufacturing a nonvolatile memory element, the memory element including a lower electrode layer; an upper electrode layer formed above the lower electrode layer; and a metal oxide thin film layer formed between the lower electrode layer and the upper electrode layer, the method comprising the steps of:
forming the metal oxide thin film layer on the lower electrode layer;
forming the upper electrode layer on the metal oxide thin film layer; and
performing at least either one of a heat treatment and a plasma treatment on the metal oxide thin film layer in an oxygen-containing atmosphere to thereby form, in the metal oxide thin film layer, a first region whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer and the upper electrode layer and a second region arranged around the first region and having a larger content of oxygen than the first region,
wherein the lower electrode layer, the upper electrode layer and the metal thin film oxide layer are formed such that an outer peripheral surface of at least one of the lower electrode layer and the upper electrode layer is not flush (coplanar or aligned) with an outer peripheral surface of the second region.