IP Library Granted Patent US 8,713,128
Granted Patent B2
US 8,713,128 · App. 12/710,168 · Granted Apr 29, 2014

Method and system for utilizing native ethernet as a virtual memory interconnect

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Quick Facts
Patent No.
US 8,713,128
App. No.
12/710,168
Granted
Apr 29, 2014
Kind
B2
Abstract

In various embodiments of a method and system for utilizing native Ethernet as a virtual memory interconnect, a first networking device may be operable to transcode a memory read command and/or a memory write command to memory access information and encapsulate the memory access information within in one or more fields of an Ethernet frame. The memory access information may be communicated over an Ethernet link to a second networking device where it may be utilized to access memory that is associated with the memory read command and/or the memory write command. For example, the memory access information may indicate an address of the memory to be accessed, whether a read operation and/or a write operation is to be performed, whether the frame comprises data to be written to the memory, and/or whether a locally administered address space is utilized.

Claims (26)

1. A method for networking, the method comprising:

performing by circuitry in a first networking device:

identifying a memory access command for accessing a virtual memory address;

translating the virtual memory address to a physical memory address;

determining that the physical memory address translated from the virtual memory address is within a memory of a second networking device, and in response:

transcoding the memory access command to memory access information;

encapsulating the memory access information in an Ethernet frame, wherein the memory access information is usable by the second networking device to perform the memory access command on the memory of the second networking device and wherein the memory access information indicates that the Ethernet frame is associated with a virtual memory access; and

communicating the Ethernet frame comprising the memory access information to the second networking device over an Ethernet link.

2. The method according to claim 1 , comprising encapsulating the memory access information in one or more fields of the Ethernet frame, including: a destination address field, an Ethertype field, a payload field, a transaction identification field, or a subtype field.

3. The method according to claim 2 , wherein the destination address field indicates that a locally administered address space is utilized.

4. The method according to claim 1 , wherein the memory access information indicates the physical memory address of the memory of the second networking device to be accessed by the memory access command.

5. The method according to claim 1 , wherein the memory access information indicates whether the memory access command comprises a memory read command or a memory write command.

6. The method according to claim 1 , wherein memory access information indicates whether the Ethernet frame comprises data to be written to the memory of the second networking device.

7. A system for networking, the system comprising:

circuitry operable to:

identify a memory access command for accessing a virtual memory address;

translate the virtual memory address to a physical memory address;

determine that the physical memory address translated from the virtual memory address is within a memory of a second networking device, and in response:

transcode the memory access command to memory access information;

encapsulate the memory access information in an Ethernet frame, wherein the memory access information is usable by the second networking device to perform the memory access command on the memory of the second networking device and wherein the memory access information indicates that the Ethernet frame is associated with a virtual memory access; and

communicate the Ethernet frame comprising the memory access information to the second networking device over an Ethernet link.

8. The system according to claim 7 , where the circuitry is operable to encapsulate the memory access information in one or more fields of the Ethernet frame, including: a destination address field, an Ethertype field, a payload field, a transaction identification field, or a subtype field.

9. The system according to claim 8 , wherein the destination address field indicates that a locally administered address space is utilized.

10. The system according to claim 7 , wherein the memory access information indicates the physical memory address of the memory of the second networking device to be accessed by the memory access command.

11. The system according to claim 7 , wherein the memory access information indicates whether the memory access command comprises a memory read command or a memory write command.

12. The system according to claim 7 , wherein the memory access information indicates whether the Ethernet frame comprises data to be written to the memory of the second networking device.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2010
From: TEENER, MICHAEL JOHAS; CURRIVAN, BRUCE; DIAB, WAEL WILLIAM; KARAOGUZ, JEYHAN; KIM, YONGBUM; MA, KENNETH
To: BROADCOM CORPORATION
Reel/Frame 024083/0128 →