IP Library Granted Patent US 8,125,041
Granted Patent B2
US 8,125,041 · App. 12/711,660 · Granted Feb 28, 2012

Semiconductor device

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Quick Facts
Patent No.
US 8,125,041
App. No.
12/711,660
Granted
Feb 28, 2012
Kind
B2
Abstract

A semiconductor device includes: a semiconductor substrate 1 ; a through electrode 7 extending through the semiconductor substrate 1 ; a diffusion layer 24 formed in a region of an upper portion of the semiconductor substrate 1 located on a side of the through electrode 7 ; and a diffusion layer 22 formed in an upper portion of the diffusion layer 24 . A portion of the side surface of the through electrode 7 facing the diffusion layer 24 is curved, and a portion of the surface of the diffusion layer 24 facing the through electrode 7 is curved.

Claims (16)

1. A semiconductor device, comprising:

a semiconductor substrate through which a through hole extending from the top surface through the bottom surface is formed;

a through electrode filled in the through hole to extend through the semiconductor substrate;

an insulating film formed on the inner wall of the through hole to surround the side surface of the through electrode;

a first diffusion layer containing impurities formed in a region of an upper portion of the semiconductor substrate located on a side of the through electrode;

a second diffusion layer formed to cover the first diffusion layer, the second diffusion layer containing impurities at a lower concentration and hence being higher in electric resistance than the first diffusion layer; and

a connection electrode formed on the top surface of the semiconductor substrate to be connected to the through electrode,

wherein

a portion of the side surface of the through electrode facing the second diffusion layer is curved toward the inside of the through hole,

an imaging region in which a plurality of light-receiving portions are arranged is formed on the top surface of the semiconductor substrate,

a peripheral circuit is formed on the top surface of the semiconductor substrate in a region outside of the imaging region, and

the first diffusion layer and the second diffusion layer constitute part of the peripheral circuit.

2. The semiconductor device of claim 1 , wherein

a potential difference occurs between the second diffusion layer and the through electrode during operation.

3. The semiconductor device of claim 1 , wherein

the opening area of the through hole is larger as the position in the through hole is farther from the bottom surface of the semiconductor substrate toward the top surface up to a predetermined position, whereby the inner wall of the through hole is curved.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2010
From: MINAMIO, MASANORI; FUJII, KYOKO
To: PANASONIC CORPORATION
Reel/Frame 024246/0646 →