Device synchronization using independent clocks

1. A method for maintaining synchronization among a plurality of devices using clocks, wherein the plurality of devices operate together for a plurality of iterations in an iterative looped manner, comprising:

each device establishing a clock based on a common signal, wherein the clock does not pause, and wherein each clock has a constant relationship with each other clock over time;

each device rounding a first step time of a first step of a first iteration to one of two first nearest clock cycles, wherein the first step time does not occur on either of the two first nearest clock cycles, and wherein the first step time specifies an end of the first step;

upon reaching the one of the two first nearest clock cycles, each device performing a respective action in a synchronized manner with respect to the other devices;

over one or more additional steps of the first iteration, each device rounding a respective step time for each of the one or more additional steps to remove rounding error, wherein said rounding the respective step time is performed dynamically during run time; and

upon reaching the end of a step, each device performing a respective action in a synchronized manner with respect to the other devices.

2. The method of claim 1 , wherein said rounding a first step time, said performing a respective action, said rounding a respective step, and said performing a respective action are performed over each step of each iteration of the plurality of iterations.

3. The method of claim 1 , wherein rounding a respective step time comprises:

each device rounding a second step time of a second step of the first iteration to one of two second nearest clock cycles, wherein said rounding incorporates the rounding of the first step time of the first step;

upon reaching the one of the two second nearest clock cycles, each device performing a respective second action in a synchronized manner with respect to the other devices.

4. The method of claim 1 , wherein each step time is programmable.

5. The method of claim 1 , wherein the first action performed by each device comprises reconfiguration of itself resulting in a second hardware configuration of the device.

6. The method of claim 5 , wherein the reconfiguration determines the next step time.

7. The method of claim 1 , wherein the common signal comprises a frequency reference.

8. The method of claim 1 , wherein the common signal comprises a trigger.

9. The method of claim 1 , wherein each step time is determined based on a counter for the clock, wherein the counter does not pause, or pauses only for a known and deterministic time.

10. The method of claim 1 , wherein each step time is based on an interval from the preceding step.

11. A non-transitory computer accessible memory medium storing program instructions for maintaining synchronization among a plurality of devices using clocks, wherein the plurality of devices operate together for a plurality of iterations in an iterative looped manner, wherein the program instructions are executable by a processor of a device of the plurality of devices to:

establish a clock based on a signal, wherein the clock does not pause;

round a first step time of a first step of a first iteration to one of two first nearest clock cycles, wherein the first step time does not occur on either of the two first nearest clock cycles, and wherein the first step time specifies an end of the first step;

upon reaching the one of the two first nearest clock cycles, perform a first action in a synchronized manner with respect to other devices of the plurality of devices; and

for one or more additional steps of the first iteration:

round a respective step time for each of the one or more additional steps to remove rounding error, wherein said rounding the respective step time is performed dynamically during run time; and

upon reaching the end of a step, perform a respective action in a synchronized manner with respect to the other devices.

12. The non-transitory computer accessible memory medium of claim 11 , wherein said rounding a respective step time comprises:

rounding a second step time of a second step of the first iteration to one of two second nearest clock cycles, wherein said rounding incorporates the rounding of the first step time of the first step; and

wherein said performing a respective action upon reaching the end of a step comprises:

upon reaching the one of the two second nearest clock cycles, performing a respective second action in a synchronized manner with respect to the other devices.

13. The non-transitory computer accessible memory medium of claim 11 , wherein the first action comprises a reconfiguration of the device, resulting in a second hardware configuration of the device, wherein the reconfiguration determines the next step time.

14. The non-transitory computer accessible memory medium of claim 11 , wherein the common signal comprises a frequency reference.

15. The non-transitory computer accessible memory medium of claim 11 , wherein each step time is determined based on a counter for the clock, wherein the counter does not pause, or pauses only for a known and deterministic time.

16. A device configured to maintain synchronization among a plurality of devices using clocks, wherein the plurality of devices operate together for a plurality of iterations in an iterative looped manner, wherein the device comprises:

one or more input and output ports; and

logic coupled to the one or more input and output ports, wherein the logic is configured to:

establish a clock based on a common signal received via an input port of the one or more input and output ports, wherein the clock does not pause;

round a first step time of a first step of a first iteration to one of two first nearest clock cycles, wherein the first step time does not occur on either of the two first nearest clock cycles, and wherein the first step time specifies an end of the first step;

upon reaching the one of the two first nearest clock cycles, perform a respective first action in a synchronized manner with respect to the other devices;

over one or more additional steps of the first iteration round a respective step time for each of the one or more additional steps to remove rounding error, wherein said rounding the respective step time is performed dynamically during run time; and

upon reaching the end of a step of the one or more additional steps, perform a respective action in a synchronized manner with respect to the other devices.

17. The device of claim 16 , wherein said rounding a respective step time comprises:

rounding a second step time of a second step of the first iteration to one of two second nearest clock cycles, wherein said rounding incorporates the rounding of the first step time of the first step; and

wherein said performing a respective action upon reaching the end of a step comprises:

upon reaching the one of the two second nearest clock cycles, performing a respective second action in a synchronized manner with respect to the other devices.

18. The device of claim 16 , wherein the first action comprises a reconfiguration of the device, resulting in a second hardware configuration of the device, wherein the reconfiguration determines the next step time.

19. The device of claim 16 , wherein the logic comprises digital counter logic.

20. The device of claim 16 , wherein the logic comprises a processor, an arithmetic logic unit, and memory medium.

21. The device of claim 16 , wherein the device comprises a measurement device, wherein the plurality of devices comprise measurement devices and operate together for a plurality of iterations in an iterative looped manner to perform test or measurement functions, and wherein the first step of the first iteration comprises a respective one or more measurements or tests according to a first hardware configuration of the device.

22. The device of claim 21 , wherein the first action performed by the measurement device comprises reconfiguration of itself, and wherein the reconfiguration comprises changing the measurement device's hardware configuration, resulting in new test or measurement parameters or new register values that alter subsequent tests or measurements that the measurement device performs.

23. The non-transitory computer accessible memory medium of claim 11 , wherein the plurality of devices comprise measurement devices and operate together for a plurality of iterations in an iterative looped manner to perform test or measurement functions, and wherein the first step of the first iteration comprises a respective one or more measurements or tests according to a first hardware configuration of the measurement device.

24. The non-transitory computer accessible memory medium of claim 23 , wherein the first action performed by each measurement device comprises reconfiguration of itself, and wherein the reconfiguration comprises changing the measurement device's hardware configuration, resulting in new test or measurement parameters or new register values that alter subsequent tests or measurements that the measurement device performs.

25. The method of claim 1 , wherein the plurality of devices comprise measurement devices and operate together for a plurality of iterations in an iterative looped manner to perform test or measurement functions, and wherein the first step of the first iteration comprises a respective one or more measurements or tests according to a first hardware configuration of the measurement device.

26. The method of claim 25 , wherein the first action performed by each measurement device comprises reconfiguration of itself, and wherein the reconfiguration comprises changing the measurement device's hardware configuration, resulting in new test or measurement parameters or new register values that alter subsequent tests or measurements that the measurement device performs.