Clock supply method and information processing apparatus
A clock supply method for supplying a clock to a plurality of processing units includes supplying a clock from a first clock supply unit to processing units forming a first group as a primary clock and to processing units forming a second group as a standby clock; supplying a clock from a second clock supply unit including a clock source different from that of the first clock supply unit to the processing units forming the second group as a primary clock and to the processing units forming the first group as a standby clock; and when a processing unit in the first or second group detects an abnormality of the primary clock, switching the standby clock into use in place of the primary clock being supplied to the processing units that has detected the abnormality belongs; wherein the first and second clock supply units supply clocks with the same frequency.
1. A clock supply method for supplying a clock to a plurality of processing units, comprising:
supplying a clock from a first clock supply unit to first processing units forming a first group among the plurality of processing units as a primary clock and to second processing units forming a second group among the plurality of processing units as a standby clock;
supplying a clock from a second clock supply unit including a clock source different from a clock source of the first clock supply unit to the second processing units as a primary clock and to the first processing units as a standby clock; and
switching, when one of the first processing units or one of the second processing units detects an abnormality of its primary clock, the standby clock into use in place of the primary clock being supplied to the one of the first and second processing units for which the abnormality of the primary clock is detected,
wherein the first and second clock supply units supply clocks with the same frequency and none of the plurality of processing units belong to both of the first and second groups at the same time.
2. The clock supply method according to claim 1 , wherein the switching is made in each of the first and second processing units in the group to which the processing unit that has detected the abnormality belongs.
3. The clock supply method according to claim 1 , wherein the first processing units form a first partition and the second processing units form a second partition.
4. The clock supply method according to claim 1 , wherein each of the first processing units respectively forms different partitions.
5. The clock supply method according to claim 1 , wherein the first and second clock supply units are provided separately from the first and second processing units.
6. The clock supply method according to claim 1 , wherein the first clock supply unit is provided in at least one processing unit in the first processing units and the second clock supply unit is provided in at least one processing unit in the second processing units.
7. An information processing apparatus comprising:
a first clock supply unit supplying a clock;
a second clock supply unit supplying a clock;
first processing units in a first group supplied with the clock from the first clock supply unit as a primary clock and supplied with the clock from the second clock supply unit as a standby clock; and
second processing units in a second group supplied with the clock from the second clock supply unit as a primary clock and supplied with the clock from the first clock supply unit as a standby clock;
wherein each of the first and second processing units includes a detection circuit detecting an abnormality of a primary clock and a switching circuit switching the standby clock into use in place of the primary clock being supplied to one of the first and second processing units with which the abnormality clock is detected when the detection circuit detects an abnormality of the primary clock, and the first and second clock supply units supply clocks with the same frequency and none of the plurality of processing units belong to both of the first and second groups at the same time.
8. The information processing apparatus according to claim 7 , wherein the first processing units form a first partition and the second processing units form a second partition.
9. The information processing apparatus according to claim 7 , wherein each of the first processing units forms different partitions.
10. The information processing apparatus according to claim 7 , wherein the first and second clock supply units are provided separately from the first and second processing units.
11. The information processing apparatus according to claim 7 , wherein the first clock supply unit is provided in at least one processing unit in the first processing units and the second clock supply unit is provided in at least one processing unit in the second processing units.
12. The information processing apparatus according to claim 7 , wherein each of the first processing units comprises:
a plurality of processors; and
a clock driver that distributes a clock supplied from the switching circuit to the plurality of processors.
13. The information processing apparatus according to claim 12 , further comprising a management unit that controls the information processing apparatus, wherein:
when the detection circuit detects the abnormality of the primary clock, the detection circuit provides an error notification to the management unit; and
in response to the error notification, the management unit inhibits the clock supply unit supplying the primary clock to the first processing units and inhibits the clock driver supplying the primary clock in the first processing units.