IP Library Granted Patent US 9,244,883
Granted Patent B2
US 9,244,883 · App. 12/716,027 · Granted Jan 26, 2016

Reconfigurable processor and method of reconfiguring the same

Inventors: Jae-un Park (Seoul, KR); Ki-seok Kwon (Seoul, KR); Sang-suk Lee (Busan-si, KR)
Assignee: Samsung Electronics Co., Ltd.
G06F15/7867G06F9/30189G06F9/3897
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Quick Facts
Patent No.
US 9,244,883
App. No.
12/716,027
Granted
Jan 26, 2016
Kind
B2
Abstract

A technology for controlling a reconfigurable processor is provided. The reconfigurable processor dynamically loads configuration data from a peripheral memory to a configuration memory while a program is being executed, in place of loading all compiled configuration data in advance into the configuration memory when booting commences. Accordingly, a reduction in capacity of a configuration memory may be achieved.

Claims (48)

1. A reconfigurable processor comprising:

functional units;

a configuration memory configured to store configuration data of the functional units and of a loop to be executed; and

a configuration memory manager configured to

determine whether the configuration data is currently stored in the configuration memory based on a loop information table comprising a loop ID identifying the configuration data and a valid flag indicating whether the configuration data is currently stored in the configuration memory, and

read the configuration data from a peripheral memory according to the loop ID, and store the read configuration data in the configuration memory while a program is being executed, in response to the configuration data being determined to be not currently stored in the configuration memory,

wherein the loop information table comprises information of a next loop to be executed after the loop, and

wherein the configuration memory manager is further configured to:

determine whether next configuration data of the functional units and of the next loop is currently stored in the configuration memory based on the information of the next loop that is included in the loop information table, and based on the loop information table comprising a valid flag indicating whether the next configuration data is currently stored in the configuration memory; and

read the next configuration data from the peripheral memory, store the read next configuration data in the configuration memory while the program is being executed, and update the valid flag indicating whether the next configuration data is currently stored in the configuration memory, in response to the next configuration data being determined to be not currently stored in the configuration memory.

2. The reconfigurable processor of claim 1 , wherein the configuration data is generated while compiling.

3. The reconfigurable processor of claim 1 , wherein the configuration memory manager is further configured to update the valid flag to indicate that the configuration data is not currently stored in the configuration memory in response to the loop being completed and the loop and the next loop being in different loop groups.

4. The reconfigurable processor of claim 1 , wherein the loop information table comprises a size of the configuration data.

5. The reconfigurable processor of claim 1 , wherein the configuration memory manager is configured to read the configuration data from the peripheral memory based on the size of the configuration data that is included in the loop information table.

6. The reconfigurable processor of claim 1 , wherein the configuration memory manager comprises the loop information table.

7. A reconfigurable processor configured to operate in a first operating mode and a second operating mode, the reconfigurable processor comprising:

functional units;

a controller configured to control operating modes of the functional units;

a configuration memory configured to store configuration data of the functional units in the second operating mode and of a loop to be executed; and

a configuration memory manager configured to

determine whether the configuration data is currently stored in the configuration memory based on a loop information table comprising a loop ID identifying the configuration data and a valid flag indicating whether the configuration data is currently stored in the configuration memory, and

read, in the second operating mode, the configuration data from a peripheral memory according to the loop ID, and store the read configuration data in the configuration memory while a program is being executed, in response to the configuration data being determined to be not currently stored in the configuration memory,

wherein the loop information table comprises information of a next loop to be executed after the loop, and

wherein the configuration memory manager is further configured to:

determine whether next configuration data of the functional units and of the next loop is currently stored in the configuration memory based on the information of the next loop that is included in the loop information table, and based on the loop information table comprising a valid flag indicating whether the next configuration data is currently stored in the configuration memory; and

read the next configuration data from the peripheral memory, store the read next configuration data in the configuration memory while the program is being executed, and update the valid flag indicating whether the next configuration data is currently stored in the configuration memory, in response to the next configuration data being determined to be not currently stored in the configuration memory.

8. The reconfigurable processor of claim 4 , wherein the configuration data is generated while compiling.

9. The reconfigurable processor of claim 4 , wherein:

the first operating mode is a very long instruction word (VLIW) mode;

the second operating mode is a coarse grained array (CGA) mode; and

the controller is configured to change from the VLIW mode to the CGA mode in response to the controller encountering a loop instruction.

10. A reconfiguration method of a reconfigurable processor, the reconfiguration method comprising:

determining whether configuration data of functional units and of a loop to be executed is currently stored in a configuration memory configured to store the configuration data according to a loop identifier (ID) identifying the configuration data, based on a loop information table comprising the loop ID and a valid flag indicating whether the configuration data is currently stored in the configuration memory;

reading the configuration data from a peripheral memory according to the loop ID, and storing the read configuration data in the configuration memory while a program is being executed, in response to the configuration data being determined to be not currently stored in the configuration memory,

wherein the loop information table comprises information of a next loop to be executed after the loop;

determining whether next configuration data of the functional units and of the next loop is currently stored in the configuration memory based on the information of the next loop that is included in the loop information table, and based on the loop information table comprising a valid flag indicating whether the next configuration data is currently stored in the configuration memory; and

reading the next configuration data from the peripheral memory, storing the read next configuration data in the configuration memory while the program is being executed, and updating the valid flag indicating whether the next configuration data is currently stored in the configuration memory, in response to the next configuration data being determined to be not currently stored in the configuration memory.

11. The reconfiguration method of claim 10 , further comprising loading the configuration data into the peripheral memory during a booting sequence.

12. A reconfiguration method of a reconfigurable processor, the reconfiguration method comprising:

determining whether configuration data of functional units and of a loop to be executed is currently stored in a configuration memory configured to store the configuration data according to a loop identifier (ID) identifying the configuration data, based on a loop information table comprising the loop ID and a valid flag indicating whether the configuration data is currently stored in the configuration memory;

reading the configuration data from a peripheral memory according to the loop ID, storing the read configuration data in the configuration memory while a program is being executed, and updating the valid flag to indicate that the configuration data is currently stored in the configuration memory, in response to the configuration data being determined to be not currently stored in the configuration memory,

wherein the loop information table comprises information of a next loop to be executed after the loop;

determining whether next configuration data of the functional units and of the next loop is currently stored in the configuration memory based on the information of the next loop that is included in the loop information table, and based on the loop information table comprising a valid flag indicating whether the next configuration data is currently stored in the configuration memory; and

reading the next configuration data from the peripheral memory, storing the read next configuration data in the configuration memory while the program is being executed, and updating the valid flag indicating whether the next configuration data is currently stored in the configuration memory, in response to the next configuration data being determined to be not currently stored in the configuration memory.

13. The reconfiguration method of claim 12 , wherein the method is performed in response to an operating mode of the reconfigurable processor being changed from a very long instruction word mode to a coarse grained array mode.

14. The reconfiguration method of claim 12 , further comprising:

generating the configuration data when compiling; and

loading the configuration data into the peripheral memory during a booting sequence.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2010
From: PARK, JAE-UN; KWON, KI-SEOK; LEE, SANG-SUK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 024015/0985 →
Priority Claims (1)
KR 10-2009-0034218 · Apr 20, 2009 · national
Continuity (1)
Related Publication 20100268862A1 · Oct 21, 2010